Senior ASIC Verification Engineer, Coherent High Speed Interconnect
Core
Verify high-speed coherent interconnect designs, architecture, golden models, and micro-architecture for mobile SoCs and GPUs.
Role type
Senior IC ASIC verification engineer (coherent high-speed interconnect)
Builds
High-speed coherent interconnects for mobile SoCs and GPUs
Domain
Semiconductor / High-speed interconnects
Deliverable
production ML models | product features
Required skills
System Verilog, UVM, C++, random stimulus generation, functional coverage, assertion-based verification, debugging, analytical skills
Preferred skills
Architecture of test bench environments, PCIE/CXL/CHI protocols, mentoring
Technologies
System Verilog, UVM, C++, VCS, Debussy, GDB
Responsibilities
Develop verification infrastructure (Testbenches, BFMs, Checkers, Monitors), define verification scope and test/coverage plans, verify design correctness, collaborate with architects and silicon teams
Seniority
Senior, hands-on IC
