DFT Engineer - Advanced Process Platform(Scan / MBIST / BSD / Silicon Diagnosis)
Core
Define and implement DFT strategies (Scan, MBIST, BSD) for advanced-node SoCs and chiplet/3D-IC designs to ensure ASIC reliability and yield.
Role type
DFT Engineer (Advanced Process Platform)
Builds
End-to-end DFT insertion flows and test patterns for N4/N3/N2 process nodes.
Domain
Semiconductor / Advanced Process Nodes / DFT
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Scan architecture, MBIST, BSD/JTAG strategies, ATPG, fault coverage closure, gate-level simulation, test-mode validation, scan chain continuity, yield ramp analysis
Preferred skills
Chiplet/3D-IC design experience, advanced-node process knowledge
Technologies
Synopsys Tessent, Siemens EDA tools, VCS, Xcelium
Responsibilities
Define and implement Scan, MBIST, and BSD/JTAG strategies; Develop and optimize ATPG patterns for various fault models; Validate DFT logic correctness through gate-level simulation; Lead post-silicon bring-up and test activities (CP/FT/HTOL/HVS); Apply scan-based volume diagnosis and yield ramp strategies
Seniority
Mid-Senior, hands-on IC
