Experienced AMS Design Verification Engineer (m/f/d)
Core
Design Verification Engineer for mixed-signal (AMS) silicon, creating self-checking verification environments and ensuring bug-free tape-outs.
Role type
Senior IC Design Verification Engineer (Mixed-Signal)
Builds
Pre-silicon verification environments and test scenarios for upcoming Apple products
Domain
Semiconductor / Mixed-Signal Analog & Digital Design
Required skills
SystemVerilog, UVM, Constrained Random Verification, OOP, Performance Analysis, Power Analysis, Gate-level Verification
Preferred skills
Assertion Based Verification, C++, Python, Verilog, FPGA Emulation, AI/ML
Technologies
SystemVerilog, UVM, C++, Python, Verilog, FPGA
Responsibilities
Define verification strategy and construct self-checking environments; code test scenarios and assertions; perform performance and power analysis; support gate-level verification and lab bring-up; collaborate with Analog and Digital Design engineers.
Seniority
Senior, hands-on IC