Staff DFT Design Engineer
Core
Leads end-to-end design, implementation, verification, validation, and debugging of DFT architectures for Digital and Mixed-Signal ICs, specifically power management and signal management functions.
Role type
Staff DFT Design Engineer
Builds
Power management ICs, sensors, motor control, display drivers, and audio amplifiers for portable and non-portable markets.
Domain
Semiconductor / Integrated Power Semiconductors
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
DFT architecture design, RTL design and debugging, Gate-Level Verification, ATPG generation, Silicon bring-up and failure analysis, Synthesis constraints definition, LEC constraints definition, Analog/Digital/Mixed-Signal verification support, Test plan definition, Backend flow knowledge (Synthesis, P&R, DFT, Power, LEC, STA), Scripting (TCL, Python, C/C++)
Preferred skills
Automotive standards knowledge, Power management industry applications, I2C/I3C/SPI/USB/PMBUS/ARM/RISC-V designs, Advanced DFT techniques (SCAN, IDDQ, Delay Fault, SCAN Compression, LBIST, MBIST, ABIST, JTAG), ASIC tools (Cadence, Synopsis), DFT tools (Modus, Tetramax, Testsent Fastscan/TestKompress, TestInsight)
Technologies
Verilog, SystemVerilog, UVM, TCL, Python, C/C++, Cadence, Synopsis, Modus, Tetramax, Testsent Fastscan, TestKompress, TestInsight
Responsibilities
Develop and implement DFT architectures and techniques, Generate high-quality test and debug patterns, Perform STA and power analysis of DFT modes, Support Analog, Digital, and Mixed-Signal AMS verification, Define test plans for Analog and Digital structural and functional testing
Seniority
Staff, hands-on IC
