ASIC Physical Design
2,685 open positions
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Senior Principal ASIC Design Engineer AsteralabsGermany 3mo Senior technical leader driving ASIC design for next-generation Ethernet and Scale-Up (ESUN) connectivity products for rack-scale AI infrastructure.
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GPU System Integration Engineer MediaTekHsinChu 3mo RTL platform design integration including clock, reset, power, bus design, architecture, and MBIST for FPGA and Emulator.
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Senior Memory System Architect NVIDIAUS, CA, Santa Clara $152k–$242k3mo Designing and optimizing memory system architecture and micro-architecture for NVIDIA's System-on-Chip (SoC) solutions used in deep-learning, autonomous vehicles, robotics, mobile, server, and gaming systems.
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SystemC Modeling Developer (Remote)↗ UstRemote 3mo Design and develop SystemC/TLM models for next-generation Compute and AI server platforms to enable architecture exploration, performance analysis, and pre-silicon software development.
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Principal Subsystem Engineer (Design or DV) MicrosoftUnited States, California, Mountain View 3mo Lead the design or design verification of complex, high-performance custom IP and System on Chip (SoC) subsystems, focusing on AI/ML SoCs and delivering silicon from concept through bring-up.
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Hardware Engineer Western-DigitalSan Jose, CA, us 3mo Design custom silicon, electronic hardware, embedded firmware, and mechanical systems for next-generation hard disk drives and data storage products.
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SRAM Circuit Design Engineer AppleBeaverton, United States of America 3mo Design and implement custom digital SRAM circuits for Apple's high-performance silicon products (M1, A14 Bionic, etc.), optimizing for power, timing, area, and yield.
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Video Codec Design Engineer, up to Staff QualcommTaipei, Taipei City, Taiwan 3mo Architect and develop advanced video encoder and decoder hardware for high performance, low power semiconductor products.
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HBM SoC RTL Design Engineer MicronFolsom, California, United States of America $121k3mo Design, develop, and integrate next-generation HBM SoC logic die, implementing RTL for SoC-level blocks and subsystems.
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Principal Engineer Digital Design (f/m/div)↗ Infineon TechnologiesCork, County Cork, Ireland 3mo Lead architecture and implementation of complex digital and mixed-signal blocks for automotive microcontroller IPs, ensuring safety compliance and driving scalable, reusable IP development.
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Principal Digital Design Engineer AnalogdevicesGermany, Munich, Seidlstr 3mo Lead digital RTL development and architecture for complex digital controllers in power management ICs (PMICs) and mixed-signal ICs using FinFast™ technology.
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Principal SoC I/O Performance Architect↗ AMDVancouver, British Columbia, Canada 3mo Define and optimize I/O performance (bandwidth, latency, QoS) for next-generation SoCs using modeling, simulation, and post-silicon analysis to drive architecture decisions.
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RTL integration Engineer BroadcomUSA-CA San Jose Innovation Drive $144k3mo Perform IP integration, test/debug mode verification, and RTL design creation at the SoC level.
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ASIC Engineer CiscoHsinchu, Taiwan 3mo Define, design, and verify high-performance ASIC and subsystems for Cisco platforms, focusing on power, performance, and area goals.
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Lead CPU Power and Performance Architect Advanced Micro Devices, IncSanta Clara, California 3mo Lead PPA Architect ensuring CPU Core & Cache complexes for embedded products meet performance requirements within reliability, power delivery, and thermal constraints.
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Principal DFT Engineer (Silicon Engineering) SpaceXAustin - 800 3mo Lead implementation and optimization of DFT architectures for next-generation ASICs deployed in space and ground infrastructures to enable global connectivity.
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ASIC Physical Design Engineer JanestreetLondon 3mo Design, test, and deploy advanced hardware for ultra low latency trading, networking, and research infrastructure.
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AI/ML Driven ASIC Design and Implementation Automation Engineer NxpSan Diego (Treena St) $148k3mo Develop prototype AI/ML solutions to automate and optimize SoC and IP development flows for automotive processors and microcontrollers.
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