Principal Digital Design Engineer
Core
Define digital architecture and lead RTL development for complex digital controllers in power management ICs (PMICs) and mixed-signal ICs.
Role type
Principal Digital Design Engineer (SoC/PMIC)
Builds
Ultra-compact, ultra-efficient digital controllers for power management ICs
Domain
Semiconductor / Power Management ICs / Digital Design
Required skills
RTL design, digital architecture, finite state machines, embedded cores, clock-tree synthesis, synthesis tools (Synopsys, Cadence), timing analysis (STA), CDC checks, asynchronous digital design
Preferred skills
Analog circuit design, full custom circuit design, mixed-signal simulation
Technologies
RTL, Synopsys, Cadence, Xcelium, PMBus, I2C, SPI, AVSbus
Responsibilities
Define top-level requirements for digital functions, design and integrate digital blocks (control loops, state machines, regulators), own synthesizable RTL, collaborate with AMS/DV teams, execute synthesis and verification checks
Seniority
Principal, strategy & mentorship
