Senior Physical Design Methodology Engineer, Innovus Flows
Core
Developing innovative physical design methodologies for GPU, CPU, Network processors, and SOC implementation to optimize PPA (Power, Performance, Area) and runtime on advanced technology nodes.
Role type
Senior Physical Design Methodology Engineer
Builds
High-performance chip hardware for Datacenter AI, HPC, Networking, Robotics, and Autonomous driving
Domain
Semiconductor Physical Design / EDA / Advanced Process Technology
Deliverable
production ML models | product features
Required skills
Physical Design flow development, PPA optimization, STA, extraction, timing/RC correlation, low power design (UPF), EM/IR analysis, synthesis flows, EDA tool scripting (TCL, Perl, Python, C++)
Preferred skills
AI/ML application to EDA, data analysis/ML libraries (NumPy, SciPy, scikit-learn, PyTorch), Cadence Innovus suite proficiency
Technologies
Innovus, Genus, Tempus, Quantus, Joules, UPF, FSDB, SAIF
Responsibilities
Develop physical design methodologies for implementation of processors and SoCs; Drive tool and methodology improvements with internal/external partners; Apply AI/ML approaches to CAD to improve design performance and efficiency
Seniority
Senior, hands-on IC
