Senior Design Engineer
Core
Designing high-performance, high-bandwidth Network-on-Chip (NoC) and AI SoC microarchitectures, including RTL design, synthesis, and SOC integration.
Role type
Senior IC digital design engineer (NoC/AI SoC)
Builds
Production ASICs and SoCs for AI applications
Domain
Semiconductor / AI Hardware
Deliverable
production ML models | product features
Required skills
Microarchitecture specification, RTL coding (Verilog/System Verilog), Clock Domain Crossing (CDC), Lint closure, Synthesis, Timing constraints, PPA trade-offs, Post-Silicon Debug, NoC design, Networking ASIC design, Complex algorithmic design for AI, Script development
Preferred skills
Fabric design, Complex control logic design
Technologies
Verilog, System Verilog
Responsibilities
Develop IP microarchitecture specifications, Perform RTL design and synthesis, Execute Lint/CDC/FEV checks, Integrate subsystems into SoC, Collaborate with architecture, verification, and physical design teams, Ensure design implementation and verification to spec
Seniority
Senior, hands-on IC
