ASIC Engineer
Core
Define, design, and verify high-performance ASIC and ASIC subsystems for Cisco platforms, focusing on power, performance, and area goals.
Role type
Senior ASIC Engineer (Digital/Analog/Mixed-Signal)
Builds
High-volume, high-quality ASIC subsystems and complex blocks for Cisco networking platforms.
Domain
Semiconductor / ASIC Design
Required skills
ASIC architecture and design, verification methodologies, physical design, power and signaling solutions, analog/mixed-signal design, EDA flow development, debugging at ASIC/SW/HW levels, code review leadership
Preferred skills
Reusable code development, lab bring-up, platform-level design leadership, collaboration with mixed-signal and system teams
Technologies
EDA tools, ASIC design flows, mixed-signal design tools
Responsibilities
Drive definition, architecture, and design of high-performance ASICs; own complex or multiple functional areas; develop and deploy PD EDA flows; own physical design of highly complex blocks; identify, design, and implement power and signaling solutions; define new verification methodologies; lead code reviews at platform level; collaborate with mixed-signal and system teams to specify requirements; debug at ASIC, SW, and HW levels; participate in chip-level issue resolution.
Seniority
Senior, hands-on IC
