ASIC Engineer
Core
Define, design, and verify high-performance ASIC and subsystems for Cisco platforms, focusing on power, performance, and area goals.
Role type
Senior IC ASIC Engineer (Digital/Analog/Mixed-Signal)
Builds
High-volume ASIC chips and subsystems for networking infrastructure
Domain
Semiconductor design / Networking hardware
Deliverable
production ML models | product features
Required skills
ASIC architecture, digital design, analog/mixed-signal design, verification methodologies, physical design, EDA flow development, debugging (ASIC/SW/HW), power and signaling solutions
Preferred skills
Reusable code development, block-level issue resolution, chip-level issue resolution, lab bring-up, platform-level code reviews
Technologies
PD EDA flows, mixed-signal design tools
Responsibilities
Drive definition, architecture, and design of high-performance ASICs; own complex or multiple functional areas; debug at ASIC, SW, and HW levels; lead design work by solving block and chip level issues; define new verification methodologies; own physical design of highly complex blocks; identify, design, and implement power and signaling solutions
Seniority
Senior, hands-on IC