Analog IC Design
2,193 open positions
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Senior/ Staff/ Principal - Silicon Design Validation Engineer MicronHyderabad - Phoenix Aquila, India 2mo Develop, validate, characterize, and qualify new NAND Flash memory products through silicon design validation.
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Design Engineer ArmBengaluru, India 2mo Develop transistor-level physical layouts for Arm custom standard cells in sub-3nm process nodes to deliver high-performance, area-optimized logic libraries for next-generation SoCs and custom digital IPs.
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PRINCIPAL R&D/PRODUCT DVL ENGINEER Te-ConnectivityUSA 2mo Lead end-to-end product development of high-speed, fine-pitch, large-size sockets for digital data networks, focusing on concept development, design validation, and customer collaboration.
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Staff Package Design Engineer- experienced in package development of power SiP/module Renesas-ElectronicsZhubei, tw 2mo Design and develop package and interconnect methods for power SiP/modules, wafer level, flip-chip, and multi-chip module applications.
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Senior Staff Advance Packaging Designer Advanced Micro Devices, IncSingapore, Singapore 2mo Lead end-to-end package design execution for complex high-performance computing products, developing substrate layouts, bump maps, and interposer designs for 2.5D/3D and chiplet-based architectures.
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Principal Design Engineer CadenceHYDERABAD 2mo Architect, design, and deliver high-speed Analog/Mixed-Signal IPs and subsystems for next-generation connectivity and memory interfaces.
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Ph.D. Intern - Analog, Mixed Signal & Circuit Design MarvellSanta Clara, CA, US $79k–$158k2mo Design analog and mixed-signal circuit blocks for production-grade IP and research-stage silicon in advanced CMOS processes, supporting hyperscaler AI infrastructure.
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Digital Design Engineer Lead - Custom Silicon Management AppleAustin, United States of America 2mo Lead technical engagements between Apple and silicon suppliers to define, develop, and productize custom silicon for mobile products (iPhone, iPad, AppleTV).
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Senior Mask Layout Design Engineer NVIDIATaiwan, Hsinchu 2mo Perform physical layout for mixed-signal functions like PLLs, high-speed I/O circuits, and ESD structures in sub-micron CMOS technologies.
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Principal Field Application Engineer - Optical Connectivity SemtechUSA - San Jose, CA $180k2mo Principal Field Application Engineer driving design wins and leading co-development for high-speed optical and copper interconnect solutions in AI data centers.
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Staff Optical Design Engineer LumentumUSA - CA - San Jose (Ridder) $112k2mo Designing high-speed optical modules and performing tolerance analysis for optical trains to support AI, cloud computing, data centers, and telecom systems.
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Director of 3D Stacked Logic Design SkhynixamericaSan Jose, CA $250k2mo Lead design and implementation of high-speed digital IP for 3D-stacked DRAM peripheral circuits and DFT, driving co-development with U.S. customers for DRAM-on-Logic systems.
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Engineer II- Product↗ Microchip Technology Inc.Burnaby, British Columbia, Canada $76k–$114k2mo Characterize, analyze, and debug high-speed SERDES interfaces (up to 32Gbps NRZ/128Gbps PAM4) for datacenter, automotive, and space applications.
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GaN Power Architecture Tech Device Engineering STMicroelectronicsCatania, Italy €38k2mo Design reliable and robust power components within GaN technology platforms using TCAD simulations and physical modeling.
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Principal IC Analog / Mixed Signal Design Engineer AnalogdevicesUS, MA, Wilmington $157k2mo Lead analog and mixed-signal circuit design for high-reliability power, connectivity, and analytics solutions in hyperscale data center platforms, specifically mixed-signal SoCs combining precision analog front-ends, high-speed data converters, and embedded…
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Lead Systems Signal Integrity/Power Integrity Engineer CerebrasSunnyvale, CA $220k2mo Lead System Signal Integrity and Power Integrity Engineer solving complex integrity challenges in next-generation AI compute systems.
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Senior PCB Design Engineer Arista-NetworksSanta Clara, CA, us $133k2mo Design and develop ultra-high-speed networking platforms, including optical interface platforms up to 800G and 1.6T, for enterprise campuses, hyperscale datacenters, and AI clusters.
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Lead Engineer Analog ASIC Design (f/m/div.) Bosch-GroupRemote €88k2mo Provide technical leadership for analog ASIC design sub-teams to develop next-generation power management solutions for the automotive industry.
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R&D Engineer IC Design BroadcomKorea-Seoul-HiBrand, KR 2mo Design advanced RF power amplifiers for RF front-end modules, covering architecture, transistor-level circuit design, simulation, layout, and validation.
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Analog Field Applications Engineer (Santa Clara, CA) Texas InstrumentsSanta Clara, CA, United States 2mo Partner with Sales to provide analog technical expertise throughout the sales cycle, solving customer projects and creating new opportunities.
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Leitender Ingenieur für analoges ASIC-Design (m/w/d) (w/m/div.) Robert Bosch GmbHRemote €88k2mo Lead technical teams in developing next-generation analog ASIC power management solutions for the automotive industry.
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Power Integrity Design Engineer – PDN / EMIR - Cork, Ireland QualcommCork, Ireland 2mo Perform power integrity analyses (IR-drop, Electromigration) for high-performance, low-power ASICs and SOCs to ensure power grid quality and Vmin compliance.
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Senior Principal Analog Engineer -Power Management NxpHsinchu 2mo Lead the definition, architecture, design, verification, and validation of complex analog and mixed-signal integrated circuits for hybrid converter and power delivery solutions in automotive and robotics applications.
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Analog Layout Lead LumilensSan Jose 2mo Lead full-custom analog and mixed-signal layout for next-generation silicon platforms, ensuring performance, reliability, and tape-out readiness.
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Memory Design Engineer↗ AmbiqSingapore, Singapore 2mo Design ultra-low power embedded SRAM and Register File IPs for advanced SoC products operating across conventional, near-threshold, and sub-threshold voltage ranges.
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Graduate – Analog Design Engineer InfineonAndover, MA 2mo Design and validate analog/mixed-signal IP blocks for radiation-hardened power management applications.
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Senior Photonics IC Design Engineer MediaTekIrvine, CA 2mo Design, simulate, and test building blocks for photonic ICs including modulators, filters, and detectors.
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Experienced ASIC Analog Layout Engineer (m/f/d) AumovioRegensburg, BY, de 2mo Top-level integration of analog and mixed-signal ICs, driving layout development for robust, DRC-compliant designs with optimal area utilization.
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Senior Standard Cell Library Engineer IntelUS, California, Santa Clara $122k–$232k2mo Design, characterize, and test leading-edge standard cells to enable customers with robust semiconductor solutions.
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