Analog IC Design
1,386 open positions
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Application Engineering-Bachelor’s or Master’s degree in Electronics, Electrical Engineering GlobalFoundriesSofia 4mo Customer-facing Design Support Engineer supporting GlobalFoundries' mature, RF, and advanced node platforms (350nm to 12nm) with a focus on IPs and digital design flows.
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Sr. Design Layout Engineer ON SemiconductorRoznov pod Radhostem, Vsetin, Czech Republic 4mo Create layout designs of analog circuits in submicron technologies, developing multidimensional layouts and detailed drawings from schematics.
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Silicon Packaging Design Engineer IntelUS, Arizona, Phoenix $106k–$106k4mo Design and implement physical layout and routing of silicon interposers and embedded bridges to optimize package performance, cost, and manufactability.
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Senior Analog / Mixed-Signal IC Design Engineer PsiQuantumPalo Alto, California, United States $145k–$145k4mo Design and deliver high-performance analog and mixed-signal integrated circuits from concept through silicon validation and production for million-qubit, fault-tolerant quantum systems.
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Senior / Principal DRAM Product Development Engineer – DEG Technology MicronBoise, ID - Main Site 4mo Design, analyze, and verify memory, logic, and analog circuits for advanced DRAM nodes, focusing on data path blocks like Sense Amplifiers and timing distribution to improve robustness, yield, and performance.
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Staff Signal and Power Integrity Engineer ArmChandler, Arizona $198k–$198k4mo Develop novel System-in-Package designs and electrical integrity solutions to enhance Arm IP performance.
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Senior Quantum Engineer - Cryo-CMOS Analog Circuit Design MicrosoftUnited States, Washington, Redmond 4mo Design and develop CMOS analog circuits and functional blocks for quantum control applications, translating system-level requirements into robust circuit implementations.
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Analog IC Design Engineer Texas InstrumentsBengaluru, Karnataka, India 4mo Lead an Analog IC design team with product ownership from definition to release, designing and evaluating electronic parts and integrated circuits for consumer electronics, mobile computing, and communications.
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Senior Engineer, Analog Design Engineering AnalogdevicesUS, MA, Wilmington $124k–$124k4mo Design and develop state-of-the-art integrated semiconductor products, focusing on precision analog, mixed-signal, and power analog circuits.
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IC Layout engineer MediaTekIrvine, CA 4mo Developing high-quality physical layouts for analog and mixed-signal integrated circuits including data converters, power management, and high-speed front-end IP.
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Senior Photonic Layout Design Engineer NVIDIAUS, CA, Santa Clara $132k–$132k4mo Physical design and verification of high-speed mixed-signal and Silicon Photonic Integrated Circuits (PICs) from proof-of-concept to manufacturing readiness.
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Hardware Engineering Technical Leader - Acacia (hybrid) CiscoMaynard, Massachusetts, US $149k–$149k4mo Lead hardware engineering for high-speed coherent optical interconnect products (400G, 800G, 1.6T) in Silicon Photonics and DSP.
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High Speed Analog Design Engineer NxpChandler (Office) 4mo Design high-performance analog and mixed-signal circuits for high-speed interfaces, clocking, and precision analog functions in USB and similar applications.
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Lead Analog IC Designer CadenceSAN JOSE $115k–$115k4mo Design and development of analog/mixed signal IC circuit blocks from concept through verification.
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Senior IC Packaging Engineer AxiadoTaipei, tw 4mo Define and drive high-performance, low-power packaging architectures for advanced IC and System-in-Package (SiP) products, leading efforts from early technology path finding through production ramp.
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Senior Quantum Analog Layout Engineer MicrosoftUnited States, Washington, Redmond 4mo Deliver Schematic-to-Graphic Database System (GDS) layouts for high-performance, high-speed, low-power analog IP blocks and interconnectivity solutions across multiple process nodes including deep FinFET.
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Analog Design Engineer FlirUS - Goleta, CA $114k–$114k4mo Lead analog designer of infrared image sensor arrays, responsible for system-level analysis, transistor-level simulations, and chip-level architectural decisions.
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