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Hardware & Physical Engineering
› Analog IC Design
Analog IC Design
1,386 open positions
Senior Power Integrity (PI) Analysis Engineer
MediaTek
Austin, TX
3mo
Own IR-drop sign-off and power grid implementation for high-performance CPU blocks to ensure robust voltage margins.
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Sr. Principal SI/PI Engineer
Cadence
SAN JOSE
$179k–$179k
3mo
Sr. Principal SI/PI Engineer leading test chip package design, evaluation board optimization, and channel model extraction for high-speed IP products.
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Senior Staff Analog Design Engineer
Renesas-Electronics
Chandler, Arizona, us
3mo
Design, simulation, and layout supervision of CMOS power management circuits, ensuring designs meet performance, area, power, and timescale constraints while guiding major blocks into production.
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Sr. Layout Engineer
Renesas-Electronics
Takasaki, jp
3mo
Designing mask layouts for next-generation LV and MV shielded-gate trench MOSFET technologies to optimize performance and accelerate product industrialization.
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Principal Engineer- HIG HBM Layout
Micron
Hyderabad - Phoenix Aquila, India
3mo
Lead end-to-end layout execution and full-chip technical decisions for analog, mixed-signal, and custom digital blocks in HBM products.
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Staff Analog Design Automation Engineer
Analogdevices
India, Bangalore, Nova
3mo
Lead the definition, architecting, specification, and implementation of next-generation mixed-signal product design flows leveraging AI and state-of-the-art CAE tools.
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Principal Engineer- HIG HBM Layout
Micron
Hyderabad, Telangana, India
3mo
Lead end-to-end layout execution and full-chip technical decisions for analog, mixed-signal, and custom digital blocks in HBM products.
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Principal Engineer - Device Model Engineer
GlobalFoundries
IND - Karnataka - Bengaluru - North
3mo
Perform model extractions for DC and RF frequencies for semiconductor devices (Diodes, Varactors, Resistors, BEOL caps, Hall devices, photo detectors) and develop compact models based on device physics for SOI, Bulk, and GaN technologies.
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MTS ASIC Architect
Micron
Bengaluru, India
3mo
Define silicon-level architectures for high-bandwidth, energy-efficient, and scalable DRAM products, balancing trade-offs across silicon, packaging, and system integration.
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MTS HIG-HBM-LAYOUT
Micron
Hyderabad, Telangana, India
3mo
Lead end-to-end layout execution and full-chip technical decisions for analog, mixed-signal, and custom digital blocks in HBM products.
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Principal Quantum Engineer - Readout
Microsoft
United States, Washington, Redmond
3mo
Lead the design and test of scalable readout circuitry for topological qubits, interfacing across teams to codesign readout systems with evolving qubit designs and control requirements.
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Senior Staff Analog Design Engineer
Renesas-Electronics
Bengaluru, KA, in
3mo
Designing and owning complex analog integrated circuits (ICs) and subsystems for power management, including PMICs, DC-DC converters, and LDOs for mobile and handheld devices.
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Lead Design Engineer
Cadence
BANGALORE
3mo
Lead Analog Design Engineer responsible for designing high-speed Die-to-Die (D2D) and SERDES products on leading-edge technology nodes (e.g., 3nm FinFET CMOS) from concept to verification.
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Principal HBM Design Architect
Micron
Richardson, Texas, United States of America
3mo
Design, simulate, analyze, and floorplan digital and analog DRAM circuits for next-generation high-bandwidth memory (HBM) solutions using 3D stacking and TSV-based integration.
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Principal HBM Design Architect
Micron
Richardson, TX
3mo
Design, simulate, analyze, and floorplan digital and analog DRAM circuits for next-generation high-bandwidth memory (HBM) solutions using 3D stacking and TSV-based integration.
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Analog IC Design Manager
Semtech
GBR -Stansted
3mo
Leading analog and mixed-signal design engineering activities for high-speed IC product lines, owning the full new product introduction (NPI) lifecycle from definition to volume production.
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Principal Design Engineer
Cadence
BANGALORE
3mo
Design of high-speed Die-to-Die (D2D) and SERDES products and analog/mixed signal IC circuit blocks from concept to verification for leading-edge technology nodes.
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Analog IC Design Engineer | BCP
Texas Instruments
Knoxville, TN, United States
3mo
Lead analog IC design from definition to release for battery charging applications in consumer electronics and mobile computing.
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Analog Design Engineer m/f/d
Texas Instruments
Freising, Bayern, Germany
3mo
Design and develop analog, mixed-signal, and power management integrated circuits (ICs) for TI products.
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Analog IC Design Engineer
Semtech
GBR -Stansted
3mo
Design and development of complex analogue and mixed-signal subsystems for high-speed IC programmes supporting data centres, 5G, and fibre-to-the-home.
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Executive Director of R&D Engineering for 3DIC-Advance Packaging
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Synopsys
Sunnyvale, CA, US
$268k–$268k
3mo
Lead global engineering for 3DIC silicon IP and advanced packaging design, enabling AI infrastructure and HPC products.
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Layout Designer | DCC DAC
Texas Instruments
Tucson, AZ, United States
3mo
Developing and preparing layout drawings of analog and digital semiconductor devices from schematics and geometry provided by circuit design engineers.
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Quantum PDK Engineer
GlobalFoundries
USA - New York - Malta
$98k–$98k
3mo
Develop, deploy, and maintain Process Design Kits (PDKs), compact models, and design enablement infrastructure for quantum devices and cryogenic control/readout ICs.
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New College Grad - HBM Layout Engineer
Micron
Jalisco, Mexico
3mo
Designing IC layouts for leaf cells, standard cells, or sub-blocks to ensure design accuracy through physical verification.
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Staff Design Engineer - HBM Design
Micron
Richardson, TX
3mo
Designing and analyzing digital and analog circuits for HBM Base die and Core DRAM die to optimize manufacturing functions, performance, power, and reliability.
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Principal Analog IC Design Engineer, High Speed SerDes
Cadence
SAN JOSE
$137k–$137k
3mo
Design and development of analog/mixed signal IC circuit blocks for high-speed SerDes and I/O applications from concept through verification.
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Sr Photonics Engineer (PIC)
Anellophotonics
Santa Clara, CA
3mo
Designing, testing, and optimizing photonic integrated circuits (PICs) for high-performance navigation systems used in autonomous vehicles, aerospace, and military applications.
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Silicon Photonics PIC Design Engineer
Broadcom
USA-California-San Jose-1320 Ridder Park Drive
$144k–$144k
3mo
Design, simulate, and validate next-generation Photonic Integrated Circuits (PICs) for high-performance optical interconnect solutions.
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Memory Packaging Engineer
MediaTek
San Jose, CA
3mo
Lead the development of cutting-edge 2.5D/3D packaging and memory subsystem solutions for Datacenter, HPC, AI, and Automotive business units.
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NAND Designer / Layout
Micron
Tokyo, Japan
3mo
Design and optimize base die circuits for next-generation NAND flash memory products, including memory arrays, page buffers, and string drivers.
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Senior Engineer Design Enablement Design Manual Engineer
GlobalFoundries
Singapore
3mo
Develop and validate semiconductor design rules (Ground Rules) and create test structures to ensure manufacturability and competitiveness of GF technologies.
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Design Verification Engineer - Acacia Networks
Cisco
Holmdel, New Jersey, US
$152k–$152k
3mo
Design and run automated testing of PIC (photonic integrated circuit) devices to debug, bring-up new products, and improve production yields.
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Senior Signal Integrity / Power Integrity (SI/PI) Engineer
Arista-Networks
Santa Clara, CA, us
$180k–$275k
3mo
Design, simulate, and characterize high-speed interconnects (channels, vias, packages) for next-generation SerDes technologies (112G/224G/448G PAM4) in Ethernet and optical networking platforms.
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Senior Optical System Engineer
Arista-Networks
Santa Clara, CA, us
$150k–$150k
3mo
Lead the design, validation, and optimization of advanced optical sub-systems including silicon photonics PICs, optical engines, and high-speed DSP-based optical links for hyperscale AI infrastructure.
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Principal Design Engineer, HBM
Micron
Richardson, TX
3mo
Lead cross-functional efforts to drive silicon debug, product quality, and system-level stability for high-volume High Bandwidth Memory (HBM) products.
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Senior Package Design Engineer
Micron
Boise, ID - Main Site
3mo
Lead co-design activities bridging silicon design, package architecture, and product development for advanced DRAM and memory products targeting Mobile, Automotive, AI, Edge/Cloud, and Data Center applications.
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Senior Analog & Mixed-Signal Modelling Architect
Ciena
Ottawa, CA
$109k–$109k
3mo
Design, modeling, and system-level validation of analog and mixed-signal subsystems for next-generation high-speed coherent optical modems.
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Staff PDK Engineer
Analogdevices
US, OR, Beaverton
$135k–$135k
3mo
Ground-up development of Process Design Kits (PDK) for internal semiconductor process technologies used in analog, mixed-signal, and power management product design and manufacturing.
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Principal Engineer- DEG Layout
Micron
Bengaluru, Karnataka, India
3mo
Lead layout design and development for critical analog, mixed-signal, custom digital blocks, standard cells, and full chip levels.
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IC Package Mechanical FEA Engineer (R&D)
Broadcom
USA-Colorado-Fort Collins-4380 Ziegler Road
$108k–$108k
3mo
Mechanical FEA engineer developing high-performance package designs for complex ASICs used in AI, networking, HPC, and 5G base stations.
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Design Layout Engineer
Micron
Tlaquepaque, Jalisco, Mexico
3mo
Translating schematics into fabrication reticules for DRAM products by designing and verifying analog and digital layouts.
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Senior Analog RF Design Engineer
Ciena
Ottawa
$114k–$114k
3mo
Design and verification of broadband RF driver and transimpedance amplifiers for Ciena's WaveLogic programs.
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Principal Analog IC Design Engineer
Semtech
GBR -Stansted
3mo
Leading the design and development of high-speed analog ICs from concept to volume production, serving as a key technical authority for circuit architecture and chip development projects.
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Engineer NAND CMOS PI
Micron
Boise, ID - Main Site
3mo
Define electrical targets and transistor structures for the company's NAND Memory Technology Roadmap to ensure manufacturability and high yield.
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Senior Principal Analog / Mixed-Signal Design Engineer
Analogdevices
Ireland, Cork
3mo
Technical authority leading the design and development of sophisticated mixed-signal integrated circuits, driving architecture innovation and solving complex analog/digital tradeoffs.
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Interconnect Hardware Engineer
NVIDIA
Israel, Yokneam
3mo
Design and develop robust test solutions, electrical specifications, and testing platforms for high-speed optical communication devices.
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Principal Mixed-Signal Design Engineer
Analogdevices
US, TX, Austin, Plaza on the Lake
$157k–$157k
3mo
Leading the development of high-speed data converters (ADCs/DACs) and related circuit architectures for SoC integration.
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Staff Engineer, Analog Design
Analogdevices
India, Bangalore, Nova
3mo
Design next-generation automotive Battery Management System (BMS) chips, including low-power radio transceivers, high-precision battery monitoring, embedded micro-controllers, and analog/digital components for EVs and green energy.
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Engineer, Semi Packaging Engineering
Analogdevices
US, MA, Wilmington
$75k–$75k
3mo
Design and develop advanced systems-level semiconductor packaging solutions for healthcare, industrial, robotics, and physical AI applications.
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Design Engineer
ON Semiconductor
Scottsdale, AZ, United States
3mo
Design, layout, and verification of analog protection and small signal semiconductor products for industrial, automotive, and wireless applications.
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