Analog Layout Lead
Core
Lead full-custom analog and mixed-signal layout for next-generation silicon platforms, ensuring performance, reliability, and tape-out readiness.
Role type
Senior IC analog layout lead
Builds
Custom silicon platforms including chip-to-chip optical interconnects and photonic engines
Domain
Semiconductor / Analog IC Design / Photonics Infrastructure
Deliverable
production ML models
Required skills
full-custom analog and mixed-signal layout, advanced CMOS node expertise (28nm or below), Cadence Virtuoso, physical verification (DRC/LVS), floorplanning, mentoring layout engineers, PDK qualification
Preferred skills
post-layout simulation (Spectre/Calibre), 3D stacking technologies, advanced packaging layout, reusable analog layout templates
Technologies
Cadence Virtuoso, Spectre, Calibre
Responsibilities
Lead full-custom layout of complex analog and mixed-signal blocks; Define and enforce analog layout methodologies; Drive parasitic-aware layout strategies; Collaborate with circuit designers to translate schematic intent; Own physical verification closure; Establish floorplanning and integration strategies; Provide technical guidance and review layouts; Partner with process technology teams to evaluate new nodes.
Seniority
Senior, hands-on IC with leadership responsibilities