Analog IC Design
1,386 open positions
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Design Engineer ON SemiconductorScottsdale, AZ, United States 3mo Design, layout, and verification of analog protection and small signal semiconductor products for industrial, automotive, and wireless applications.
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Engineer, Semi Packaging Engineering AnalogdevicesUS, MA, Wilmington $75k–$75k3mo Design and develop advanced systems-level semiconductor packaging solutions for healthcare, industrial, robotics, and physical AI applications.
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Hardware Design Engineer – Interconnect Design NVIDIADenmark, Roskilde 3mo Design, optimization, and testing of high-speed interconnect solutions and transceiver designs for data center infrastructure.
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Principal Engineer – Multi-Physics Sign-off (Timing, PDN & Thermal) ArmSan Jose, California $263k–$263k3mo Develop, enable, and support 3DIC and 2.5D physical design and signoff methodologies for advanced multi-die systems, covering timing, power, thermal, and multiphysics analysis.
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Sr Engineer, Memory CAD, Guadalajara MicronTlaquepaque, Jalisco, Mexico 3mo Support CAD tools, flows, and collateral for HBM design teams while supporting mixed-signal, transistor-level custom IC design activities.
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Lead Thermal Engineer JabilSanchong 4mo Lead thermal design and simulation for high-speed networking components, specifically Co-Packaged Optics (CPO) and ASIC-optics integration in high power density environments.
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Analog Mixed Signal Design Engineer IntelRemote $130k–$183k4mo Senior Mixed Signal Design Engineer driving static timing analysis (STA) and design closure for next-generation mixed-signal systems at Intel.
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Senior Semiconductor Reliability Engineer – Advanced Silicon & Packaging GraphcoreBristol, UK 4mo Lead reliability strategy and execution for advanced AI silicon nodes and packaging technologies, ensuring robust product reliability from design enablement through high-volume manufacturing.
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Sr Analog Physical Design Engineer | Kilby Labs Texas InstrumentsDallas, TX, United States 4mo Senior Analog Physical Design Engineer responsible for managing circuit layouts from floor planning to fabrication, collaborating with design teams on test/production dies, and leading technical guidance for layout projects.
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Custom Layout Engineer (Senior) MediaTekSingapore 4mo Physical design implementation of Foundation IP, Analog IP, and RFIC for next-generation process platforms and SoC developments.
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Analog and Mixed-Signal Designer FlirRemote 4mo Design high-speed analog and mixed-signal blocks for data converters (ADC/DAC) exceeding 10 GS/s, including SAR and pipeline architectures.
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Mixed Signal Design Engineer CienaOttawa $91k–$91k4mo Designing high precision Sigma-Delta DAC and ADC for control and monitoring, and creating SystemVerilog and IBIS-AMS models for high-speed SerDes IP.
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Sr Principal Design Engineer CadenceSAN JOSE $154k–$154k4mo Designing physical IP for industry-standard high-speed serial-links, covering mixed-signal circuit design, verification, and testing.
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Senior Lead Engineer Analog Validation NxpPune 4mo Comprehensive validation of key product indicators (KPIs) for all analog circuitry in a given platform, ensuring measurements are highly automated and reported clearly.
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Director, Hardware Engineering (Client Optics Group) CiscoCarlsbad, California, US $217k–$217k4mo Leading a high-performance engineering design team to drive end-to-end execution of optical transceiver development for silicon-photonics-based chipsets and modules.
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Laboratory Engineer for Semiconductor Test & PCB Design SemronFriedrichstadt, Dresden 4mo Designing test procedures, equipment, and prototype boards for custom semiconductor dies and wafers.
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Senior Manager Analog Engineering Renesas-ElectronicsRemote $225k–$225k4mo Lead a team of analog designers and serve as the technical project lead for developing configurable mixed-signal ASICs, optimizing performance, power, and die size.
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Advanced Packaging Development Engineer BroadcomUSA-CA Irvine Alton Parkway Bldg 2 $127k–$127k4mo Develop and enable advanced packaging technology to integrate memory dies and SoC dies into one package for AI-related products.
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Senior Member of Technical Staff – RRAM Technology and Architecture GlobalFoundriesSingapore 4mo Technical authority for advanced RRAM (Resistive RAM) technology development, defining roadmaps and ensuring translation from research to manufacturable memory solutions.
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Senior Electrical Manufacturing NPI Engineer Arista-NetworksSanta Clara, CA, us $140k–$140k4mo Lead manufacturing readiness and transfer for complex data center networking equipment including high-speed switches, routers, and optical transport gear.
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Analog Modeling & Testing Engineer Intern MarvellCordoba, Argentina 4mo Support analog IP product development through IC design, layout, silicon evaluation, and characterization.
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IC Design Consultant - EDA - Cairo, Egypt Siemens-EdaNew Cairo, EGY, Egypt $24k–$24k4mo Trusted technical advisor supporting customer adoption and deployment of Siemens Calibre physical verification tools for complex integrated circuit design.
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Director, Silicon Photonics Design AevaMountain View, CA 4mo Lead design of silicon photonics devices for 4D LiDAR systems used in autonomous vehicles, AI data centers, and industrial automation.
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SRAM Design Engineer Samsung ElectronicsSSIR, Goldstone, Bangalore, India 4mo Designing highly competitive SRAM circuits and leading teams to deliver SRAM IP meeting performance/power specifications.
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Internship and New Graduate Applications - Germany MonolithicpowerEttenheim, Germany 4mo Design, verification, and validation of next-generation Analog & Mixed-Signal ICs and power electronics systems.
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SI Simulation Engineer UbiquitiTaipei 4mo Perform pre-layout and post-layout signal integrity simulation for high-speed interfaces to optimize channel structures and ensure performance.
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Senior PCB Layout Automation Engineer HpeSunnyvale, California, United States of America $136k–$259k4mo Designs and automates PCB layouts for electrical/electronic parts, subsystems, and integrated circuitry, focusing on high-speed technology and validation.
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Silicon Photonic Engineer (CPO) LumilensSingapore 4mo Developing high-performance photonic devices, process integration platforms, and advanced packaging for Co-Packaged Optics (CPO) to enable chip-to-chip optical interconnects for AI supercomputing.
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