Analog IC Design
1,386 open positions
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R&D Engineer BroadcomUSA-CA San Jose Innovation Drive $168k–$168k3mo Technical lead for multi-chip semiconductor assembly and system pathfinding for leading-edge AI and high-performance computing modules.
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Engineer, SIG Electrical Design MicronSan Jose, CA $151k–$151k3mo Designing, developing, and verifying electronics for semiconductor test equipment, specifically SSD test systems.
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Co-Packaged Optics (CPO) Reliability Sr. Staff/Principal Engineer MediaTekSan Jose, CA 3mo Lead reliability, qualification, and robustness assessment for next-generation co-packaged photonic and electronic systems, focusing on high-speed silicon switch ASICs and optical transport.
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Power Integrity Engineer-Silicon LumilensSan Jose 3mo Architecting and validating power delivery networks (PDNs) for 2.5D/3D heterogeneous integration of electrical ICs, photonic ICs, and chiplets to support extreme power densities in AI supercomputing.
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Lead Standard cell design/characterization Engineer NxpBangalore 3mo Design, characterization, and layout development of standard cell libraries and macros for NXP's logic library team, supporting design teams with reliability and timing closure consultancy.
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Principal Analog Engineer ON SemiconductorBangalore, Karnataka, India 3mo Designing complex CMOS integrated circuits and analog IP blocks for automotive, industrial, and medical products.
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Associate Staff Analog Design Engineer SilabsAustin $125k–$125k3mo Designing and validating analog/mixed-signal blocks for wireless communication ICs targeting IoT applications.
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System Engineer | MSP Texas InstrumentsDallas, TX, United States 3mo Define new product roadmaps and platforms by translating customer requirements into technical specifications for analog/mixed-signal ICs.
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Senior/Staff Analog Design Engineer - SerDes OlixAustin, TX 3mo Design high-speed SerDes and mixed-signal subsystems for next-generation SoCs, spanning circuit implementation through post-silicon validation.
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Advanced Packaging Reliability Engineer OpenAISan Francisco 3mo Lead reliability engineering for advanced packages used in high-performance AI and computing systems, focusing on mechanical and thermal risk assessment, modeling, and failure analysis.
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Senior Hardware Network Fabric Development Engineer HpeChippewa Falls, Wisconsin, United States of America $120k–$275k3mo Design, simulate, validate, debug, and optimize high-performance electrical systems for industry-leading supercomputer systems.
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Senior Layout Engineer (M/F/D) AdtranBerlin, Germany 3mo Developing full-custom physical layouts for high-speed analog and mixed-signal integrated circuits (SiGe BiCMOS and CMOS) used in optical transceiver solutions.
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Senior Staff Analog/Mixed-Signal Engineer (f/m/div)↗ Infineon TechnologiesValencia, VC, ES 3mo Lead the development of high-performance analog and mixed-signal architectures and circuits, owning technical decisions from architecture through silicon bring-up.
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Senior PCB Layout Engineer CienaNew Providence - NJ $120k–$120k3mo Design and deliver high-performance printed circuit boards for scalable optical engine platforms, connecting schematic intent with physical implementation.
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Principal Power IC Design Engineer AnalogdevicesUS, AZ, Chandler, East Elliot 3mo Technical authority leading the design and development of high-performance power management integrated circuits, driving architecture decisions from concept through silicon validation.
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Sr Staff Analog Engineer Renesas-ElectronicsRemote 3mo Design and verify complex analog block-level and sub-system circuits for custom mixed-signal ASICs, focusing on high-voltage analog and precision applications.
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Prinicipal Customer Engagement Engineer - PDK CadenceSHANGHAI 3mo Develop and maintain PDKs (Process Design Kits) for semiconductor foundries, ensuring design rule compliance and simulation accuracy for IC design flows.
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