Senior Signal Integrity Engineer
Core
Ensuring optimal signal integrity for high-speed interfaces including Ethernet, PCIe, and DDR5 through analysis, modeling, and simulation.
Role type
Senior IC signal integrity engineer
Builds
High-speed networking and communication platforms (Ethernet routers, high-performance platforms)
Domain
Hardware engineering / High-speed electronics / Signal integrity
Required skills
Signal integrity analysis, Transmission line theory, EM concepts, High-speed serial interfaces (Ethernet, PCIe, DDR5), EDA tools (Ansys SIWAVE, HFSS), Time-domain and frequency-domain analysis, HSPICE simulations, PCB layout techniques
Preferred skills
112Gbps PAM4 Ethernet, PCIe Gen5, Power integrity simulations
Technologies
Ansys SIWAVE, HFSS, HSPICE, Ethernet, PCIe, DDR5
Responsibilities
Conduct signal integrity analysis and simulations for high-speed interfaces; Develop and implement signal integrity guidelines for PCB design; Analyze and resolve signal integrity issues including reflection, crosstalk, and PDN issues; Collaborate with PCB layout engineers to optimize design; Perform time-domain and frequency-domain analysis including loss, jitter, and eye-diagram analysis; Utilize EDA tools for simulation and validation; Develop behavioural models based on measured data; Conduct pre- and post-layout simulations and measurements
Seniority
Senior, hands-on IC
