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Trainee Program – Mixed-Signal IC Design for RF integrated circuits (RFIC) (all genders)

Erlangen, BAYERNFull-time2026-09-17 → 2026-10-17

Core

Trainee role in mixed-signal IC design for RF integrated circuits, focusing on design, simulation, layout, and verification of data converters, PLLs, and frequency synthesizers.

Role type

Trainee mixed-signal IC design engineer (RFIC)

Builds

RF frontends, transceivers, frequency synthesizers, and data converters for wireless communication and sensor systems

Domain

Microelectronics / RFIC / Mixed-signal circuit design

Required skills

Analog and digital circuit design, RF and high-frequency concepts, Hardware description languages (VHDL/Verilog), Scripting (Python/MATLAB/Skill/TCL), Design tools (Cadence/Synopsys)

Preferred skills

Microelectronics focus, RF engineering focus, Communications engineering focus

Responsibilities

Design, simulation, layout, and verification of mixed-signal integrated circuits; Collaborate on real projects under expert guidance; Optimize performance, power consumption, and area efficiency; Work with RF design, layout, and test teams

Seniority

Trainee (entry-level)