Senior ASIC Package Design Engineer
Core
Design advanced ASIC package architecture for high-performance mixed-signal and digital SoCs, focusing on flip-chip BGA and multi-chip module solutions for high-power satellites.
Role type
Senior IC ASIC Package Design Engineer
Builds
High-power satellite platforms with complex, high-speed, power-dense ASICs
Domain
Aerospace / Semiconductor Packaging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (ASIC packages)
Required skills
FC-BGA design, substrate stack-up definition, power delivery network (PDN) design, signal integrity (SI) analysis, power integrity (PI) analysis, thermal architecture, OSAT/vendor management, high-pin-count ASIC experience
Preferred skills
MCM/heterogeneous integration, high-speed digital/mixed-signal SoC background, aerospace/high-reliability electronics experience
Technologies
SIWave, HFSS, ADS
Responsibilities
Define ASIC package architecture including substrate stack-up and ball-map strategy; Lead trade studies for cost, performance, PI, SI, thermal, and manufacturability; Establish package design standards and methodologies; Drive detailed design of FC-BGA packages with high-speed SerDes and RF content; Define substrate stack-ups and escape routing; Partner with silicon and RF teams to co-optimize die floorplans; Lead thermal architecture including lid selection and heat-spreaders; Manage relationships with OSATs and substrate suppliers; Drive material selection and assembly process optimization
Seniority
Senior, hands-on IC
