计算信号完整性工程师
Core
Designing and optimizing high-speed signal integrity (SI) for AI and general-purpose server computing products, focusing on 224G+ bus systems and full-link performance.
Role type
Senior IC Signal Integrity Engineer (High-Speed Computing)
Builds
AI servers, general-purpose servers, high-speed bus modules (ETH/PCIe), and custom connectors/cables.
Domain
Semiconductor/Server Hardware, High-Speed Digital Design
Required skills
High-speed bus SI simulation (ETH/PCIe/DDR/LPDDR), Passive component design optimization, Full-link SI decomposition, Test campaign planning, SI issue localization
Preferred skills
Fanout design, Connector/cable module customization
Technologies
Allegro, Mentor, ADS, HFSS, Sigrity, Network Analyzers, Oscilloscopes, Phase Noise Analyzers, BERTs
Responsibilities
Track industry standards for high-speed buses (ETH/PCIe), Evaluate 224G+ system solutions, Optimize passive parameters (impedance, insertion loss, crosstalk), Perform single-point SI simulation for chips/connectors, Lead high-speed system testing and SI troubleshooting.
Seniority
Senior, hands-on IC
