Packaging SIPI Engineer, Principal Engineer
Core
Principal Packaging SIPI Engineer performing signal and power integrity tasks to optimize package and system designs for high-speed computing and server projects.
Role type
Principal IC packaging signal and power integrity engineer
Builds
High-speed SerDes electrical models and system-level simulations for computing and server platforms
Domain
Semiconductor packaging and high-speed digital design
Required skills
IO analysis, model extraction, signal integrity simulation, power distribution analysis, package extraction, time-domain analysis, frequency-domain analysis, SerDes specifications (PCIe, USB, UFS, MIPI), field solvers (HFSS, Q3D, Sentinel-PSI, Clarity), SPICE transient simulation (ADS, HSPICE), IBIS/IBIS-AMI modeling, MATLAB automation
Preferred skills
High-speed SerDes package/PCB/system design for computing/server standards, electromagnetics, transmission line theory, crosstalk analysis, C/C++ programming, Perl/Python scripting, Master's or PhD degree
Technologies
HFSS, Q3D, Sentinel-PSI, Clarity, ADS, HSPICE, MATLAB, PCIe, USB, UFS, MIPI
Responsibilities
Perform IO analysis using established methodologies including model extraction, simulation, and reporting; Analyze IO power distribution for product development and reference systems; Perform package extraction for time- and frequency-domain analysis and provide package design guidelines; Document results clearly and thoroughly
Seniority
Principal, hands-on IC
