MTS - HIG HBM - ARCHITECTURE
Core
Build and own the end-to-end design quality system for High Bandwidth Memory (HBM) solutions, ensuring silicon learnings are captured and fed back into next-generation designs.
Role type
Senior IC HBM IO Design Architecture Engineer (via careerplan.io/jobs/44489607-mts-hig-hbm-architecture-at-micron)
Builds
High-Performance Integrated Group (HIG) HBM solutions for AI and ML applications
Domain
Semiconductor / Memory and Storage / High-speed IO
Deliverable
production ML models
Required skills
High-speed clocking design (32Gbps+), IO circuit design (analog and digital), circuit verification and optimization, layout verification, parasitic extraction, off-chip protocols (UCIe, HBM, DDR, PCIe, MIPI), device characteristics, advanced packaging (CoWoS, HBM stack, D2D), AI-assisted analytics, silicon data analysis
Preferred skills
Circuit debug experience, cross-functional methodology development
Technologies
UCIe, HBM, DDR, PCIe, MIPI, CoWoS, D2D
Responsibilities
Define and standardize IO design quality process from architecture to silicon; Correlate silicon measurements and simulation performance for circuit level design analysis; Solicit input from Standards, CAD, modeling, and verification groups to ensure design quality; Leverage AI-assisted analytics to accelerate root cause identification from complex multi-variable silicon data; Drive innovation into future Memory generation
Seniority
Senior, hands-on IC
