ASIC Verification Engineering
934 open positions
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Principal Design Verification Engineer AsteralabsBengaluru 29d Functional verification of complex SoC/silicon products for server, storage, and networking applications, focusing on PCIe and CXL protocols.
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FPGA Design Verification Engineer AlteraRegus, Madhapur 1mo Intern role supporting FPGA verification activities for next-generation Altera FPGA products, specifically focusing on high-speed transceiver and ethernet protocols.
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Formal Verification Engineer NVIDIAChina, Shanghai 1mo Senior Formal Verification Engineer responsible for crafting, designing, and validating GPU clocking RTL using formal verification techniques to support consumer graphics, self-driving cars, and AI product lines.
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DFT Engineer
AmazonTel Aviv-Yafo, Tel Aviv, Israel
1mo
Define and implement DFT architectures and logic for complex SoC designs to ensure testability throughout the hardware lifecycle.
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Pre-Si FPGA Platform Development Engineer (Temporary position) IntelMexico, Guadalajara 1mo Develop, integrate, test, and debug hardware/software collateral in simulation, emulation, or FPGA models for Pre-Silicon verification and Post-Silicon validation.
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Staff GPU Design Verification Engineer – Formal Verification Samsung Electronics3900 N Capital of Texas Hwy, Austin, TX, USA $151k–$151k1mo Staff GPU Design Verification Engineer executing block and subsystem level formal verification for Samsung's next-generation mobile GPU to ensure functional correctness, power gating mechanisms, and alignment with architectural intent.
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Associate Staff Modem Verification Engineer SilabsHyderabad 1mo Own verification of wireless modem IP, subsystems, and SoCs, focusing on PHY/MAC functionality, datapaths, control, and digital/RF interfaces.
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Sr. Engineer, SoC Design Verification Engineer, System Management Controller TenstorrentToronto $100k–$100k1mo Design and execute verification tests for the System Management Controller (SMC) to enable seamless multi-chip integration in chiplet-based SoCs.
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Verification Engineer ARM Sweden ABLund, Sweden 1mo Develop and verify hardware for Machine Learning and Artificial Intelligence, specifically Arm IP for mobile and data center applications.
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Design Verification Engineer Texas InstrumentsDallas, TX, United States 1mo Develop and execute verification strategies to ensure first-pass silicon success for next-generation analog and mixed-signal ICs.
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Digital Verification Engineer NxpMunich 1mo Develop test scenarios, run simulations, and analyze results to verify electronic designs.
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Design Verification Engineer, Annapurna Labs
AmazonToronto, Ontario, Canada
$105k–$175k1mo
Design Verification Engineer developing comprehensive verification solutions for high-speed I/O and scale-up/out components across the SoC in AWS custom ML accelerators (Inferentia, Trainium).
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Sr Principal Design Engineer CadenceSAN JOSE $154k–$154k1mo Design, develop, verify, and productize system-level memory IP models for hardware-based verification platforms.
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ASIC Verification Technical Leader CiscoBangalore, India 1mo Lead ASIC verification for Cisco's Silicon One architecture, focusing on block, cluster, and top-level environments for core switching, routing, and wireless products.
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Senior Principal Verification Engineer Renesas-ElectronicsChandler, Arizona, us 1mo Architect mixed-signal verification environments and lead verification strategy for automotive PMIC designs, ensuring compliance with safety standards.
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AMS Verification Engineer (RFIC Engineering) SpaceXRedmond, WA $0k–$0k1mo Developing verification flows, testbenches, and behavioral models for next-generation RFICs and RF-SoCs used in Starlink satellites and ground infrastructure.
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Principal SOC Modeling Architect MicrosoftUnited States, Washington, Redmond 1mo Lead resolution of complex system-level challenges spanning virtual platforms, firmware, silicon architecture, and validation infrastructure to define architectural direction for SystemC/TLM-based virtual platforms supporting multiple generations of Azure…
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Principal ASIC Verification Engineer HpeSunnyvale, California, United States of America $174k–$353k1mo Lead block-level or subsystem verification for high-speed networking ASICs, from test plan creation to coverage closure, ensuring functional correctness of complex SoC designs.
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[EMN] Senior IP Design Verification Engineer (5-10 YoE) Bosch-GroupHo Chi Minh City, vn 1mo Senior IP Design Verification Engineer ensuring functional correctness and interoperability of advanced Silicon IPs for next-generation System-on-Chip (SoC) platforms.
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Senior Memory Circuit Design Verification Engineer MicronHyderabad - Phoenix Aquila, India 1mo Lead verification efforts for full-chip gate-level custom memory designs (DDR4/5, LPDDR4/5) operating at high speeds up to 6400MT/s, ensuring functional accuracy and timely delivery.
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Principal AMS Verification Engineer ON SemiconductorBangalore, Karnataka, India 1mo Own end-to-end verification of Analog Mixed-Signal (AMS) products including Power Management ICs, controllers, and drivers for consumer, industrial, and automotive applications.
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ASIC Engineer - Early Career BlueoriginGreater Seattle Area, US $129k–$129k1mo Early career ASIC verification engineer contributing to digital block design and verification within larger System-on-Chips (SoCs) for reusable space vehicles.
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Director of ASIC Design Verification SambanovasystemsSan Jose, CA $270k–$270k1mo End-to-end verification leadership for next-generation RDU chips (machine learning ASICs), covering block through full-chip verification, performance validation, and first-silicon bring-up.
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Foundation IP Memory Verification Engineer BroadcomSingapore-Yishun 1mo Verify custom memory macros and memory compilers for AI products, focusing on functional validation, signal integrity, and timing/power analysis.
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