CPU Design Verification Sr Lead Engineer
Core
Lead verification engineer for high-performance, low-power CPUs, focusing on power management and system validation.
Role type
Senior IC CPU Design Verification Lead Engineer
Builds
CPU designs and SoC power management features
Domain
Semiconductor / Hardware Engineering / CPU Design
Required skills
Power management verification, Simulation and formal verification, UPF, Verilog/System Verilog, C/C++, Embedded firmware (Assembly/C), Debug and triage, Clock gating, Power gating, DVFS/DCVS, Voltage/frequency management
Preferred skills
CPU micro-architecture, Digital logic design, DFT architecture, JTAG, IEEE1500, MBIST, Scan dump, Memory dump
Technologies
Verilog, System Verilog, C, C++, Assembly, UPF, FPGA, Emulators
Responsibilities
Develop comprehensive test plans for power management verification, Execute test plans using simulation and formal verification, Write checkers, assertions, and develop stimulus, Verify power intent using UPF, Collaborate with system architects and software teams to validate system use cases, Debug and triage failures in simulation, emulation, and silicon
Seniority
Senior, hands-on IC
