Principal Engineer - SOC Verification
Core
Design Verification Engineer verifying complex Arm-based IPs, subsystems, and SoCs for next-generation computing platforms.
Role type
Principal Design Verification Engineer (SoC)
Builds
High-performance, energy-efficient SoC solutions
Domain
Semiconductor / SoC Design / Verification
Required skills
SystemVerilog, UVM, Arm-based SoC architecture, C/C++, RTL debug, coverage closure, scripting
Preferred skills
CHI, ACE, AMBA, PCIe, DDR, Security IP, Formal verification, Emulation, FPGA, AI-assisted verification
Technologies
Verilog, SystemVerilog, UVM, C, C++, Arm, PCIe, DDR, UPF
Responsibilities
Develop and execute verification strategies for IP, subsystem, and SoC designs; Verify CPU, PCIe, DDR, Security, coherency, memory subsystem, and interconnect functionality; Perform power-aware verification and system scenario/performance validation; Own verification deliverables from planning through verification closure; Architect, develop, and maintain reusable verification environments, verification IPs, methodologies, and automation; Develop verification plans, test methodologies, test cases, and coverage closure strategies; Debug RTL, testbench, integration, and system-level issues; Collaborate with architecture, design, firmware, emulation, FPGA, validation, and post-silicon teams; Leverage automation, scripting, and AI-assisted workflows to improve verification productivity; Contribute to methodology improvements, documentation, and engineering best practices.
Seniority
Principal, hands-on IC
