AMS Design Verification Intern
Core
Intern role in Analog Mixed Signal (AMS) design verification, creating verification plans, modeling analog blocks, and managing UVM verification environments for high-precision ICs in display, lighting, and cloud power applications.
Role type
Intern, AMS Design Verification Engineer
Builds
High-performance analog and mixed-signal integrated circuits for display, lighting, and cloud power applications
Domain
Semiconductor, Analog Mixed Signal (AMS), IC Design
Required skills
System Verilog, UVM, Verilog AMS, Analog Mixed Signal simulations, State machine verification, Metric-driven verification environment management
Preferred skills
Master Thesis capability
Technologies
System Verilog, UVM, Verilog AMS
Responsibilities
Design Specifications comprehension and Verification plan creation, Analog Blocks Modelling based on Verilog AMS and System Verilog, Analog Mixed Signal (AMS) simulations, Verification of state machine progression and System Verilog analog assertions, Architect, implement, and/or manage complete metric-driven System Verilog and UVM verification environments
