CareerPlan

Photonics Layout Engineer

Palo Alto, CaliforniaRemoteFull-time$140k–$164k2026-10-26 → 2026-11-10

Core

Design, layout, and verification of photonic integrated circuits (PIC) for foundry fabrication, translating designs into manufacturable layouts.

Role type

Photonic Layout Engineer

Builds

Silicon photonic integrated circuits for quantum computing systems

Domain

Quantum computing / Silicon photonics

Required skills

Photonic integrated circuit layout, Python programming, Foundry design rules, GDSFactory/Synopsys/Cadence Photonics, Git, Design rule checking (DRC), Layout versus schematic (LVS)

Preferred skills

PDK development, Layout automation tools, Numerical analysis

Technologies

GDSFactory, Synopsys, Cadence Photonics, Python, Git

Responsibilities

Prepare and maintain photonic layouts from components to complex circuits; Drive foundry tapeouts including DRC, LVS, fill, and density checks; Develop and maintain layout infrastructure and automation tools; Contribute to PDK development by implementing and validating layout components; Prepare documentation and handoff materials for tapeouts

Seniority

Mid-level, hands-on IC