Mixed-Signal Design Engineer – RTL and Co-Simulation
Core
Design and verify digital RTL and analog-digital co-simulations for a power controller's control loop, protections, and calibration.
Role type
Mixed-Signal Design Engineer (RTL and Co-Simulation)
Builds
Power controller digital control loops and mixed-signal behavioral models
Domain
Power Management / Hardware Design
Required skills
Verilog/SystemVerilog RTL design, analog-digital co-simulation, fault handling, calibration logic, system-level verification, debugging analog-digital boundaries
Preferred skills
Digital control logic in power management, mixed-signal/custom IP knowledge, firmware/embedded controller understanding, analog design exposure
Technologies
Verilog, SystemVerilog, SPICE, Verilog-A
Responsibilities
Build and run co-simulations connecting digital RTL with analog circuits; Enhance and maintain RTL for the power controller's full digital control loop; Verify startup, steady-state, transient, calibration, and fault behavior; Debug issues across the analog–digital boundary; Develop RTL behavioral models for mixed-signal blocks; Design and implement control, protection, fault-handling, and calibration features.
