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Hardware & Physical Engineering
› Analog IC Design
Analog IC Design
2,196 open positions
NVIDIA 2027 Internships: Mixed Signal Design
NVIDIA
US, CA, Santa Clara
2mo
12-week full-time internship for students to work on mixed signal design projects with measurable business impact.
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Senior Memory Circuit Design Engineer
Broadcom
IND-Bangalore Electronic City - S1
2mo
Design and build memory or circuit blocks at the gate or transistor level, analyze memory architectures, and verify physical implementations.
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Sr Staff Engineer - Analog IC
Semtech
IND - Hyderabad
2mo
Lead the design and development of high-accuracy analog and mixed-signal ICs for force sensor AFEs, integrated force sensors, and haptic drivers.
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Principal Mixed Signal Design Engineer
Analogdevices
US, MA, Wilmington
$157k
2mo
Lead the design and architecture of complex mixed-signal systems for high-speed wireline transmitters, receivers, and clock/data recovery circuits.
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Senior PC Board Design Engineer
Advanced Micro Devices, Inc
Austin, Texas
2mo
Design and develop high-speed PCB layouts for AMD data center products, driving complex board designs from concept through production.
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Layout Engineer
Monolithicpower
Kirkland, WA
$70k
2mo
Performing layout of custom mixed-signal and analog circuits blocks to ensure quality, performance, and reliability.
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Principal Layout Engineer-DPG-LPDDR
Micron
Hyderabad, Telangana, India
2mo
Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution for complex analog, mixed-signal, memory, and high-speed interface designs.
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Data Converters Mixed Signal Lead, Sr. Staff
Qualcomm
Bangalore, India
2mo
Lead MSIP circuit design, layout, verification, and documentation for high-performance, power-efficient connectivity IP solutions (PMU, Transceivers, MSIP) supporting Mobile, Compute, AR/VR, Automotive, and IoT products.
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Principal Layout Engineer-DPG-LPDDR
Micron
Hyderabad - Phoenix Aquila, India
2mo
Lead full-chip floor planning, physical implementation, signoff, and tape-out execution for complex analog, mixed-signal, memory, and high-speed interface designs.
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Senior Packaging Technical Engineer - Hardware
NVIDIA
US, CA, Santa Clara
$168k–$259k
2mo
Define and implement silicon pad rings, substrate interconnect schemes, and lead package layout design for advanced GPU packages.
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Senior layout Engineer – DPG Layout
Micron
Hyderabad - Phoenix Aquila, India
2mo
Implement design and physical implementation of analog, mixed-signal, and custom digital blocks, supporting full-chip integration and verification.
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Analog Mixed‑Signal Layout Engineer (all gender)
Alten
Remote
2mo
Develop analog and mixed-signal IC layouts at block, module, and IP level, including high-voltage and power-management circuits.
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Senior Staff Engineer Design
Infineon
Bangalore BTP
2mo
Own end-to-end I/O library design and development for analog and mixed-signal circuit solutions, driving integration into SoCs/subsystems.
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Lead I/O Design Engineer
Nxp
Bangalore
2mo
Design and validate high-performance I/O circuits for advanced semiconductor SoCs, including GPIO, LVDS, DDR, and SerDes support.
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Senior Signal and Power Integrity Engineer
NVIDIA
US, CA, Santa Clara
$136k–$219k
2mo
Lead board/system SI design activities, PCB stack up design, material selection, design guide implementation, layout review, and post-layout analysis for high-speed interfaces.
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Power Module Multiphysics Modeling & Simulation Expert | Virtual Product Development | Autonomous Design & Synthesis | AI-Augmented Design Optimization
ON Semiconductor
Munich, Bayern, Germany
2mo
Advancing power module development through automated design synthesis using multiphysics modeling and simulation to accelerate design, optimization, and validation for SiC and GaN applications.
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Memory Design Engineer
Arm
Austin, Texas
$130k
2mo
Design and validate best-in-class memories for Arm CPUs, GPUs, and SOCs using advanced process technology nodes.
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Staff Analog Engineer
Renesas-Electronics
Chandler, Arizona, us
2mo
Technical leadership for the design of complex power management integrated circuits, ensuring successful transition to production and driving innovation in design methodologies.
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UK Residency Programme - Optoelectronics Device Engineer
Microsoft
United Kingdom, Cambridgeshire, Cambridge
2mo
Design, simulate, optimize, and characterize high-speed optoelectronic devices (photodiodes, microLEDs, VCSELs, modulators) and architectures for optical communication systems.
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Senior Packaging Technical Engineer - Hardware
NVIDIA
Taiwan, Hsinchu
2mo
Define chip pad ring, substrate interconnect scheme, and lead package layout design process to implement robust electrical packages for GPUs and AI chips.
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Senior Photonic-Integrated-Circuit Integration Engineer
Intel
US, California, Santa Clara
$191k–$312k
2mo
Architect, design, and optimize complex active and passive silicon photonic integrated circuits (PICs) for AI datacenter scale-up, laser sources, and pluggable/NPO/CPO/OCI solutions.
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Entwicklungstechniker/in
Photeon Solutions GmbH
Dornbirn, VORARLBERG
€47k–€55k
2mo
Design of high performance analog circuits including linear regulators, switching converters, DACs, ADCs, bandgaps, and high speed PHYs.
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MTS - DPG Layout
Micron
Hyderabad, Telangana, India
2mo
Senior layout engineer responsible for full chip layout design, verification, and team leadership in advanced CMOS memory and semiconductor technologies.
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Senior Staff Engineer Design
Infineon
Bangalore BTP
2mo
Architect, design, verify, and implement RTL solutions for mixed-signal subsystems and standalone IPs, ensuring power, performance, and area (PPA) targets are met.
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<Data Center>Wireline & Optical System Algorithm Sr. Engineer/Technical Manager
MediaTek
HsinChu
2mo
Design electrical/optical PHY and transceiver architecture, digital signal processing, and high-speed SerDes algorithms for wireline and optical systems.
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Senior Analog Design Engineer
Silabs
Singapore
2mo
Design and develop analog/mixed-signal/RF circuits for highly integrated SoCs used in smart home, industrial IoT, and smart cities applications.
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Senior Signal and Power Integrity Engineer
NVIDIA
Taiwan, Taipei
2mo
Developing signal and power integrity solutions for high-speed mixed-signal circuit design challenges including NVlinks, PCIe, and DP2.1.
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Display Silicon Architect
Apple
Cupertino, United States of America
2mo
Design, architect, and launch next-generation display silicon ICs and subsystems for Apple products.
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MTS - DPG Layout
Micron
Hyderabad - Phoenix Aquila, India
2mo
Senior layout engineer responsible for full chip layout design, verification, and team leadership in advanced DRAM and analog memory technologies.
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Analog Design Engineer(Precision Analog)(New Grad)
Monolithicpower
Hong Kong - China
2mo
Design and develop state-of-the-art integrated circuits for precision analog systems, covering the full product lifecycle from circuit design to silicon validation.
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Senior Simulation Engineer - Electromagnetics Specialist
PhysicsX
New York
2mo
Senior Electromagnetic Simulation Engineer specializing in high-frequency applications for semiconductor design, signal integrity, and EMI/EMC analysis.
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Senior Staff Analog Design Engineer
Renesas-Electronics
Bengaluru, KA, in
2mo
Designing and owning complex analog integrated power products (PMICs, DC-DC converters, LDOs) for next-generation phones and handheld devices.
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DRAM Memory Design Engineer - Principal | MTS | SMTS
Micron
Boise, ID - Main Site
3mo
Design and optimize next-generation DRAM products (memory arrays, control logic, datapaths, address decoding, I/O circuitry) balancing performance, power, quality, and reliability.
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Analog Design Engineer
Texas Instruments
Bengaluru, Karnataka, India
3mo
Design, develop, and evaluate analog integrated circuits and components for consumer electronics, mobile computing, and communications applications.
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Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal
Micron
Boise, ID - Main Site
3mo
Design, simulate, and optimize digital, analog, and mixed-signal circuits for advanced DRAM and emerging memory products from concept through silicon validation.
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Panel Design Engineer
Apple
Cupertino, United States of America
3mo
Design, develop, and launch next-generation display panel circuits and technologies for Apple mobile, laptop, and desktop products.
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Principal Engineer Design
Infineon
Bangalore BTP
3mo
Own end-to-end IO library design and development for analog and mixed-signal circuit solutions.
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Principal Design Engineer
Cadence
CORK 01
3mo
Lead the design of high-speed SERDES products (up to 112 Gbps) on leading-edge technology nodes (e.g., 5nm FinFET CMOS) for electronic design automation customers.
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Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal
Micron
Boise, Idaho, United States of America
3mo
Design, simulate, and optimize digital, analog, and mixed-signal circuits for DRAM and emerging memory products from concept through silicon validation.
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Senior Staff Engineer Design Application Engineering
Infineon
Penang (Malaysia)
3mo
Provide technical support to project teams in Singapore for analog IPs development using the Infineon Design System (Flows, Design Packages, and Methodologies).
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Senior Analog-/Mixed-Signal-IC-Designer:in Automotive (m/w/d) (w/m/div.)
Robert Bosch GmbH
Reutlingen, BADEN_WUERTTEMBERG
€88k
3mo
Design and develop high-performance analog and mixed-signal circuits for complex automotive ASICs, focusing on electrification and smart power applications.
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ECAD Design Manager – Wireline/Server/Payment
Jabil
Sanchong
3mo
Leading ECAD layout engineering teams and library management to ensure end-to-end PCB design execution, quality, and PLM data integrity for Wireline, Server, and Payment systems.
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Clocking Systems Engineer, Staff
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Qualcomm
Toronto, Ontario, Canada
$121k–$171k
3mo
Develop industry-leading DSP and mixed-signal SerDes architectures and solutions, specializing in clock generation, clock recovery, and timing synchronization for advanced high-speed communication products.
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Research Fellow (Analog in-memory computing macros)
Ntu
NTU Main Campus, Singapore
3mo
Designing analog in-memory computing macros and ADCs for AI accelerators.
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Staff Package Design Engineer - Cu FSM/BGBM/Bumping 封装设计专家
Renesas-Electronics
Shanghai, cn
3mo
Design and develop package and interconnect methods for power SiP/modules, wafer level chip scale package, flip-chip, multi-chip module LGA, and power device packaging.
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Senior Staff Analog Engineer
Renesas-Electronics
San Jose, CALIFORNIA, us
3mo
Design and verify complex analog block-level and sub-system circuits for custom mixed-signal ASICs, focusing on motor drivers, power management, and high-voltage solutions.
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Senior Staff Application Engineer - AMS Design
Infineon
Bangalore
3mo
Enable successful customer designs on the application level for next-generation automotive products by collaborating with cross-functional teams.
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Digital Physical Implementation and Integration Engineer
Micron
San Jose, California, United States of America
$145k
3mo
Design and analyze digital/analog circuits for memory products, owning physical implementation and top-level integration of large digital designs in NAND products.
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Staff Memory Circuit Design Engineer
Broadcom
USA-Mendota Heights-Northland
$110k
3mo
Design and build memory compilers and custom macros (SRAMs, Register-files, ROMs) at the gate or transistor level for advanced process technology.
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RF/Analog IC Layout Engineer (m/f/d)
Apple
Linz, Austria
3mo
Designing RF/Analog IC layouts for integrated cellular RF transceivers in RF CMOS technologies.
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