Senior Packaging Technical Engineer - Hardware
Core
Define chip pad ring, substrate interconnect scheme, and lead package layout design process to implement robust electrical packages for GPUs and AI chips.
Role type
Senior IC packaging engineer (hardware)
Builds
Chip floor plans, pad rings, substrates, and ball-out electrical packages
Domain
Semiconductor hardware / GPU and AI chip design
Required skills
Chip floor planning, pad ring definition, substrate interconnect design, lead package layout, transmission line theory, power delivery, signal integrity, board/system design
Preferred skills
Perl, Python, Tcl scripting, Cadence Skill, Excel
Technologies
Cadence Skill, Perl, Python, Tcl, Excel
Responsibilities
Define chip pad ring and substrate interconnect scheme; Lead package layout design process; Collaborate with circuit, signal integrity, RTL, and system design teams; Work to define chip floor plan and ball-out implementation
Seniority
Senior, hands-on IC
