Data Converters Mixed Signal Lead, Sr. Staff
Core
Lead MSIP circuit design, layout, verification, and documentation for high-performance, power-efficient connectivity IP solutions (PMU, Transceivers, MSIP) supporting Mobile, Compute, AR/VR, Automotive, and IoT products.
Role type
Senior Staff IC Mixed Signal Hardware Engineer (MSIP Design)
Builds
High-speed MSIP blocks (ADCs, DACs, PLLs) for RF Transceivers and SoCs
Domain
Semiconductors / Analog Mixed Signal / Connectivity
Required skills
MSIP circuit design, layout, verification, documentation, system architecture, circuit simulation, post-silicon validation, debugging, high-speed interface design, analog design flows (Cadence ADE, Virtuoso XL, Spectre), Verilog-AMS, MATLAB
Preferred skills
High sampling rate SAR ADCs, leading small teams, advanced technology nodes, multi-domain integration (RF, analog, digital)
Technologies
Cadence ADE, Virtuoso XL, Spectre, MATLAB, Verilog, Verilog-AMS
Responsibilities
Lead MSIP circuit design from system definition through silicon validation; oversee layout and verification of MSIP blocks; drive design excellence across lifecycle; collaborate with RF, digital, and system teams; stay updated on industry trends; provide technical leadership and mentor junior engineers
Seniority
Senior Staff, hands-on IC with technical leadership
