Senior Signal and Power Integrity Engineer
Core
Lead board/system SI design activities, PCB stack up design, material selection, design guide implementation, layout review, and post-layout analysis for high-speed interfaces.
Role type
Senior IC Signal and Power Integrity Engineer
Builds
High-speed electrical interfaces (PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB) and Power delivery networks (PDN) on PCBs
Domain
Semiconductor hardware design, high-speed digital interfaces, PCB engineering
Required skills
Electromagnetics, channel components, transmission line theory, high-speed interface design (PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB), SI/PI simulation (HFSS, Sigrity, Hspice), PCB design (Cadence Allegro, Constraints Manager), PDN analysis, TDR & VNA measurement
Preferred skills
Package design, interface timing budgets, system modeling, high-speed transmitter/receiver design, equalization schemes, signaling schemes (NRZ, PAM4)
Technologies
HFSS, Sigrity, Hspice, Cadence Allegro, Constraints Manager, TDR, VNA
Responsibilities
Lead board/system SI design activities, System-level signal integrity simulation of PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB and other interfaces, Analyze and optimize Power delivery network (PDN) on PCBs, Work closely with Package and PCB Design teams, Work with Application Engineering supporting customer board designs, Perform TDR & VNA measurement for PKG/PCB material characterization and model correlation
Seniority
Senior, hands-on IC
