Senior Signal and Power Integrity Engineer
Core
Developing signal and power integrity solutions for high-speed mixed-signal circuit design challenges including NVlinks, PCIe, and DP2.1.
Role type
Senior IC signal and power integrity engineer
Builds
Chip packages, PCBs, and high-speed I/O interfaces
Domain
Semiconductor hardware design
Required skills
Electromagnetics, transmission line theory, SI/PI/EMI applications, S/Y/Z parameters, discrete signal processing, 3/2.5-D modeling, PDN evaluation, die power delivery modeling, transient simulation, eye diagram methodology, measurement and simulation correlation
Preferred skills
Simulation automation (Matlab, Python, VBS, C), interface timing budgets, high-volume manufacturing variations, novel algorithm development
Technologies
ANSYS HFSS/Q3D/SIwave, Cadence PowerSI, CSM/Redhawk, Raptor-X, Simplis, JMP, MATLAB, VNA, TDR, DSO
Responsibilities
Craft creative SI/PI solutions for complex system design problems, perform system-level power integrity simulations, design and optimize Power Delivery Networks, conduct SI channel analysis for spec development, automate simulation and data analysis, extract post-layout SI/PI models
Seniority
Senior, hands-on IC
