Principal Design Engineer
Core
Lead the design of high-speed SERDES products (up to 112 Gbps) on leading-edge technology nodes (e.g., 5nm FinFET CMOS) for electronic design automation customers.
Role type
Principal Analog Design Engineer (SERDES)
Builds
High-speed SERDES IC circuit blocks and PMA sections for chips, boards, and systems
Domain
Semiconductor / Electronic Design Automation / High-Speed I/O
Deliverable
production ML models | product features
Required skills
CMOS SERDES design, high-speed I/O IC design, analog/mixed signal circuit design, jitter analysis, signal equalization, SERDES standards knowledge, circuit block design (Driver, Receiver, Serializer, Deserializer, Phase Interpolator, PLL, Clock Distribution, Bias/Bandgap, Voltage Regulators)
Preferred skills
Cadence tool experience, silicon evaluation lab test experience, academic publishing
Technologies
5nm FinFET CMOS, 10Gbps+, <40nm technologies
Responsibilities
Design high-speed SERDES products, develop analog/mixed signal IC circuit blocks from concept to verification, collaborate with Physical Design Engineers, provide technical leadership in circuit design and SERDES architectures
Seniority
Principal, Technical Leadership