Senior Memory Circuit Design Engineer
Core
Design and build memory or circuit blocks at the gate or transistor level, analyze memory architectures, and verify physical implementations.
Role type
Senior IC memory circuit design engineer
Builds
Physical memory macros (SRAMs, Register-files, Multi-ports, ROM) and circuit blocks
Domain
Semiconductor hardware design / Memory circuits
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Transistor-level circuit design, Memory architecture analysis, Transistor-level simulation, Post-layout simulation and verification, Floorplanning and leafcell layout integration, Characterization flow development, Automation scripting, Behavioral and physical memory modeling, Silicon test plan specification, Signal integrity and EM/IR analysis, DFT schemes understanding
Preferred skills
Silicon testing and debug, Memory compiler development
Technologies
Transistor-level simulators, Automation scripts, Test setups
Responsibilities
Analyze memory architectures and highlight tradeoffs, Design and build memory or circuit blocks at the gate or transistor level, Simulate and analyze the circuit design using transistor level simulators, Extract the layout and perform post-layout simulations and verification, Floorplan physical implementation and leafcell layout integration to build the physical macro, Integrate characterization flow to extract timing and power information, Develop scripts to automate characterization flow, simulations, and verification, Specify and verify various behavioral and physical memory models, Document the design specifications, behavioral description, and timing diagrams, Specify silicon test plan and correlate silicon to simulation data, Help debug silicon issues
Seniority
Senior, hands-on IC
