CareerPlan

New College Grad - ENGINEER, DDEG IP DEVELOPMENT

Boise, Idaho, United States of AmericaFull-time2026-10-22 → 2026-11-10

Core

Design, simulate, optimize, and validate analog and digital CMOS circuits for advanced memory products (DRAM, NAND) across the full product lifecycle.

Role type

Senior IC analog/digital circuit design engineer (memory)

Builds

High-performance DRAM and NAND memory chips

Domain

Semiconductor / Memory / Analog & Digital IC Design

Required skills

Analog and digital circuit design, Power delivery network (PDN) design, Circuit simulation and verification, Layout review and parasitic extraction, UNIX and Cadence environment proficiency, Semiconductor device evaluation

Preferred skills

Memory circuit design (DRAM), Transistor modeling, Silicon validation techniques, Multi-functional team collaboration, AI tool validation and workflow adoption

Technologies

Cadence, UNIX, AI-enabled tools (Microsoft Copilot)

Responsibilities

Design and optimize analog/digital CMOS circuits for DRAM and memory products; Collaborate with verification, process integration, and manufacturing teams; Perform circuit verification, layout review, and silicon correlation; Partner on future semiconductor process technologies; Utilize AI tools to improve productivity and decision-making

Seniority

Senior, hands-on IC