CareerPlan

Serdes Silicon Design and Micro-Architecture Engineer

San Jose, CaliforniaFull-time2026-10-21 → 2026-10-22
No visa sponsorship

Core

Lead transceiver micro-architecture definition, modeling, simulation, implementation, and verification for high-performance electrical and optical transceivers in advanced CMOS PDKs.

Role type

Senior IC analog/mixed-signal circuit design and transceiver micro-architecture engineer

Builds

High-performance electrical and optical transceivers for AMD processors

Domain

Semiconductor / Analog Mixed-Signal / High-Speed Serdes

Required skills

Analog/mixed-signal circuit design, Transceiver micro-architecture, Ultra-high-speed PHY design, Link budgeting and modeling, Silicon validation, Firmware loop design

Preferred skills

Top-level and block-level electrical/optical link budgeting, Architecture review participation, Design verification

Technologies

CMOS PDKs, Tx/Rx analog front-end, Clocking circuits, DSPs, CDR, Adaptation and calibration loops

Responsibilities

Lead transceiver micro-architecture definition, modeling, simulation, implementation, and verification; Work with pre-tapeout verification for silicon design sign-off and post-silicon validation

Seniority

Senior, hands-on IC