Intern Layout Analog Design
Core
Research and development in analog and mixed-signal circuit layout, specifically for Power Management ICs and Smart Power Stages for High-Performance Computing.
Role type
Intern analog layout engineer
Builds
Analog and mixed-signal circuit blocks for High-Performance Computing
Domain
Semiconductor / Analog IC Design
Required skills
CMOS and bipolar transistor knowledge, voltage/current references, current mirrors, amplifiers, comparators, oscillators, clocking circuits, digital gates, layout floor planning, routing, extraction, electromigration study, matching constraints
Preferred skills
Cadence design environment familiarity
Technologies
Cadence, Calibre, VXL
Responsibilities
Conceive layout of analog and mixed-signal circuit blocks, study layout conception steps from floor plan to extraction, study and apply different layout techniques, familiarize with layout tools, ensure layout quality and compliance
Seniority
Intern