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Hardware & Physical Engineering
› Analog IC Design
Analog IC Design
2,194 open positions
Senior Thermal Mechanical Photonic Designer
NVIDIA
US, CA, Santa Clara
$168k
5mo
Senior Thermal Mechanical Photonic Designer responsible for thermal and structural design of silicon photonic designs, stress simulation, and thermo-mechanical modeling of die-package interactions.
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System Engineer | DCC-PADC
Texas Instruments
Dallas, TX, United States
5mo
Define system-level architectures and product specifications for precision Analog-to-Digital Converters (ADCs) to meet customer needs in datacenter, automotive, and industrial markets.
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HBM SIPI, Staff Engineer
Micron
Richardson, Texas, United States of America
$121k
5mo
Develop high-quality Signal Integrity (SI) and Power Integrity (PI) analysis for HBM interposers, packages, and silicon channels to ensure industry benchmark signal quality and power delivery integrity.
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Layout Engineering Intern m/f/d
Texas Instruments
Freising, Bayern, Germany
5mo
Layout design of Mixed Signal Integrated Circuits (ICs) for DC/DC converters, power stages, and controllers serving personal electronics, industrial, automotive, and data centre markets.
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Analog IC Design Engineer - Sensing (PS)
Texas Instruments
Dallas, TX, United States
5mo
Lead an Analog IC design team with product ownership from definition to release, designing and developing electronic parts and integrated circuits for consumer electronics, mobile computing, and communications.
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Analog / Mixed-Signal PLL Design Engineer, Senior - Cork, Ireland
Qualcomm
Cork, Ireland
5mo
Designing low-power, low-voltage analog and mixed-signal integrated circuits for high-speed clocking IP (PLL/DLL/FLL) for Qualcomm SoCs in leading-edge process nodes (3nm+).
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Sr Design Engineer
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Coherent Corp.
Stockholm, Stockholm County, Sweden
5mo
Design and develop integrated optoelectronic components, including semiconductor lasers with integrated high-speed modulators, for high-performance computing and ultra-high-speed fiber-optic communications.
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Sr Staff Analog Engineer
Renesas-Electronics
Remote
5mo
Design and verify complex analog block-level and sub-system circuits for custom mixed-signal ASICs, focusing on high-voltage analog and precision applications.
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Analog/Mixed-Signal SerDes Design Engineer
Advanced Micro Devices, Inc
Markham, Canada
5mo
Design high-speed ADC-based receivers, DAC-based transmitters, or silicon photonics transceivers for high-performance wireline links.
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ENGINEER, DESIGN
Micron
Avezzano (AQ), Italy
€34k–€57k
5mo
Design and optimization of analog, digital, and mixed-signal circuits for advanced NAND Flash memory products.
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ENGINEER, DESIGN
Micron
Avezzano (AQ), Italy
€34k–€57k
5mo
Design and optimize high-speed datapath and interface circuits for NAND Flash memory products, focusing on timing closure, signal integrity, and power optimization at block and sub-system levels.
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Packaging Architect
MediaTek
San Jose, CA
5mo
Develop advanced packaging architecture and guide innovative packaging solutions for automotive, datacenter/HPC, and computing applications.
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Prinicipal Customer Engagement Engineer - PDK
Cadence
SHANGHAI
5mo
Develop and maintain PDKs (Process Design Kits) for semiconductor foundries, ensuring design rule compliance and simulation accuracy for IC design flows.
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Packaging Manager/Director
MediaTek
San Jose, CA
5mo
Lead the development of cutting-edge 2.5D/3D packaging solutions for Automotive, Datacenter/HPC, AI, and Computing business units.
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障がい者向け エンジニア 職(DRAM 設計・評価解析職)*Disability
Micron
Kanagawa, Japan
5mo
Design and evaluation of next-generation DRAM memory chips, including circuit design, layout, and testing.
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Senior Power Integrity (PI) Analysis Engineer
MediaTek
Austin, TX
5mo
Own IR-drop sign-off and power grid implementation for high-performance CPU blocks to ensure robust voltage margins.
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Design/Senior Design Engineer – NAND Core (NVE Engineering)
Micron
Avezzano, L'Aquila, Italy
€34k–€57k
5mo
Design and optimize analog, digital, and mixed-signal circuits for advanced NAND Flash memory products, balancing performance, power, area, and reliability.
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Design layout Engineer
Micron
Avezzano (AQ), Italy
€29k–€48k
5mo
Physical implementation of advanced NAND Flash products using analog, custom digital, and mixed-signal circuits with a focus on automation and AI-assisted methodologies.
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Sr. Principal SI/PI Engineer
Cadence
SAN JOSE
$179k
5mo
Sr. Principal SI/PI Engineer leading test chip package design, evaluation board optimization, and channel model extraction for high-speed IP products.
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Senior Staff Analog Design Engineer
Renesas-Electronics
Chandler, Arizona, us
5mo
Design, simulation, and layout supervision of CMOS power management circuits, ensuring designs meet performance, area, power, and timescale constraints while guiding major blocks into production.
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MTS HIG-HBM-LAYOUT
Micron
Hyderabad, Telangana, India
5mo
Lead end-to-end layout execution and full-chip technical decisions for analog, mixed-signal, and custom digital blocks in HBM products.
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MTS ASIC Architect
Micron
Bengaluru, India
5mo
Define silicon-level architectures for high-bandwidth, energy-efficient, and scalable DRAM products, balancing trade-offs across silicon, packaging, and system integration.
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Principal Engineer - Device Model Engineer
GlobalFoundries
IND - Karnataka - Bengaluru - North
5mo
Perform model extractions for DC and RF frequencies for semiconductor devices (Diodes, Varactors, Resistors, BEOL caps, Hall devices, photo detectors) and develop compact models based on device physics for SOI, Bulk, and GaN technologies.
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Principal Engineer- HIG HBM Layout
Micron
Hyderabad - Phoenix Aquila, India
5mo
Lead end-to-end layout execution and full-chip technical decisions for analog, mixed-signal, and custom digital blocks in HBM products.
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Principal Engineer- HIG HBM Layout
Micron
Hyderabad, Telangana, India
5mo
Lead end-to-end layout execution and full-chip technical decisions for analog, mixed-signal, and custom digital blocks in HBM products.
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Principal Quantum Engineer - Readout
Microsoft
United States, Washington, Redmond
5mo
Lead the design and test of scalable readout circuitry for topological qubits, interfacing across teams to codesign readout systems with evolving qubit designs and control requirements.
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Senior Staff Analog Design Engineer
Renesas-Electronics
Bengaluru, KA, in
5mo
Designing and owning complex analog integrated circuits (ICs) and subsystems for power management, including PMICs, DC-DC converters, and LDOs for mobile and handheld devices.
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Analog IC Design Manager
Semtech
GBR -Stansted
5mo
Leading analog and mixed-signal design engineering activities for high-speed IC product lines, owning the full new product introduction (NPI) lifecycle from definition to volume production.
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Analog Design Engineer m/f/d
Texas Instruments
Freising, Bayern, Germany
5mo
Design and develop analog, mixed-signal, and power management integrated circuits (ICs) for TI products.
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Analog IC Design Engineer
Semtech
GBR -Stansted
5mo
Design and development of complex analogue and mixed-signal subsystems for high-speed IC programmes supporting data centres, 5G, and fibre-to-the-home.
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Principal HBM Design Architect
Micron
Richardson, TX
5mo
Design, simulate, analyze, and floorplan digital and analog DRAM circuits for next-generation high-bandwidth memory (HBM) solutions using 3D stacking and TSV-based integration.
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Principal Design Engineer
Cadence
BANGALORE
5mo
Design of high-speed Die-to-Die (D2D) and SERDES products and analog/mixed signal IC circuit blocks from concept to verification for leading-edge technology nodes.
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Analog IC Design Engineer | BCP
Texas Instruments
Knoxville, TN, United States
5mo
Lead analog IC design from definition to release for battery charging applications in consumer electronics and mobile computing.
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Principal HBM Design Architect
Micron
Richardson, Texas, United States of America
5mo
Design, simulate, analyze, and floorplan digital and analog DRAM circuits for next-generation high-bandwidth memory (HBM) solutions using 3D stacking and TSV-based integration.
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Quantum PDK Engineer
GlobalFoundries
USA - New York - Malta
$98k
5mo
Develop, deploy, and maintain Process Design Kits (PDKs), compact models, and design enablement infrastructure for quantum devices and cryogenic control/readout ICs.
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Layout Designer | DCC DAC
Texas Instruments
Tucson, AZ, United States
5mo
Developing and preparing layout drawings of analog and digital semiconductor devices from schematics and geometry provided by circuit design engineers.
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Staff Design Engineer - HBM Design
Micron
Richardson, TX
5mo
Designing and analyzing digital and analog circuits for HBM Base die and Core DRAM die to optimize manufacturing functions, performance, power, and reliability.
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Analog Design Engineer
STMicroelectronics
Scottsdale, United States
$92k
5mo
Design, verification, bench testing, and bring-up of analog integrated circuits (CMOS ICs) including amplifiers, comparators, regulators, PLLs, bandgaps, and oscillators.
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Principal Analog IC Design Engineer, High Speed SerDes
Cadence
SAN JOSE
$137k
5mo
Design and development of analog/mixed signal IC circuit blocks for high-speed SerDes and I/O applications from concept through verification.
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New College Grad - HBM Layout Engineer
Micron
Tlaquepaque, Jalisco, Mexico
5mo
Design layout for leaf cells, standard cells, or sub-blocks in ICs, ensuring design accuracy through physical verification checks.
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New College Grad - HBM Layout Engineer
Micron
Jalisco, Mexico
5mo
Designing IC layouts for leaf cells, standard cells, or sub-blocks to ensure design accuracy through physical verification.
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NAND Designer / Layout
Micron
Tokyo, Japan
5mo
Design and optimize base die circuits for next-generation NAND flash memory products, including memory arrays, page buffers, and string drivers.
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Memory Packaging Engineer
MediaTek
San Jose, CA
5mo
Lead the development of cutting-edge 2.5D/3D packaging and memory subsystem solutions for Datacenter, HPC, AI, and Automotive business units.
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Senior Signal Integrity / Power Integrity (SI/PI) Engineer
Arista-Networks
Santa Clara, CA, us
$180k–$275k
5mo
Design, simulate, and characterize high-speed interconnects (channels, vias, packages) for next-generation SerDes technologies (112G/224G/448G PAM4) in Ethernet and optical networking platforms.
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Senior Optical System Engineer
Arista-Networks
Santa Clara, CA, us
$150k
5mo
Lead the design, validation, and optimization of advanced optical sub-systems including silicon photonics PICs, optical engines, and high-speed DSP-based optical links for hyperscale AI infrastructure.
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Principal Design Engineer, HBM
Micron
Richardson, TX
5mo
Lead cross-functional efforts to drive silicon debug, product quality, and system-level stability for high-volume High Bandwidth Memory (HBM) products.
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Senior Package Design Engineer
Micron
Boise, ID - Main Site
5mo
Lead co-design activities bridging silicon design, package architecture, and product development for advanced DRAM and memory products targeting Mobile, Automotive, AI, Edge/Cloud, and Data Center applications.
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RF Passive Design Engineer
Apple
San Diego, United States of America
5mo
Design and tape-out of on-chip RF/AMS passive components including inductors, transformers, capacitors, transmission lines, filters, phase shifters, and couplers for Apple mobile devices.
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Senior Analog RF Design Engineer
Ciena
Ottawa
$114k
5mo
Design and verification of broadband RF driver and transimpedance amplifiers for Ciena's WaveLogic programs.
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Staff Engineer Design
Infineon
Bangalore BTP
5mo
Design analog and mixed-signal system blocks for DC-DC converter power stages and POL ICs, including POR, Bandgap, LDO, Oscillators, drivers, current sensing, and test modes.
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