ENGINEER, DESIGN
Core
Design and optimize high-speed datapath and interface circuits for NAND Flash memory products, focusing on timing closure, signal integrity, and power optimization at block and sub-system levels.
Role type
Senior IC analog/digital/mixed-signal design engineer (NAND datapath)
Builds
High-performance NAND Flash memory products and high-speed interfaces (DDR, SerDes)
Domain
Semiconductor / Memory / Deep-submicron CMOS
Deliverable
production ML models | product features
Required skills
High-speed digital/analog/mixed-signal CMOS circuit design, Timing closure, Signal integrity analysis, PVT and corner analysis, Transistor-level implementation, Cross-functional collaboration
Preferred skills
NAND Flash or non-volatile memory experience, High-speed interface expertise (DDR, LPDDR, GDDR, SerDes), Design automation and scripting (Python), Physical design flow knowledge
Technologies
SPICE, RTL/Verilog flows, Python
Responsibilities
Design and optimize high-speed datapath and interface circuits ensuring timing closure; Translate system requirements into circuit architectures and transistor-level implementations; Perform functional, timing, and signal integrity verification using advanced simulation methodologies; Collaborate with cross-functional teams for floorplan integration and manufacturability; Develop automation solutions and support silicon validation and debug.
Seniority
Senior, hands-on IC
