Principal Design Engineer, HBM
Core
Lead cross-functional efforts to drive silicon debug, product quality, and system-level stability for high-volume High Bandwidth Memory (HBM) products.
Role type
Principal Design Engineer (Heterogeneous Integration)
Builds
High Bandwidth Memory (HBM) products for AI/ML, high-performance computing (HPC), and data-centric systems
Domain
Semiconductor / Memory / High-Speed Interfaces
Deliverable
production ML models | product features | infrastructure
Required skills
HBM/DRAM architecture, high-speed memory interfaces, silicon debug, system-level analysis, root-cause resolution, cross-functional leadership, digital/custom design and verification
Preferred skills
complex silicon/system issue ownership, architecture influence, timing/margining/SI/PI/system-level behavior/silicon correlation, DFT/mBIST/test-mode debug, Python scripting/automation
Technologies
Python, DFT, mBIST
Responsibilities
Own design health through sustaining phase driving ECO implementation and verification; Define debug strategies and serve as technical authority; Lead root-cause analysis of complex silicon and system issues; Drive alignment across DE, PE, TD, and system teams; Identify systemic issues to improve yield and reliability; Lead critical customer escalations and system bring-up support; Drive feedback into architecture and verification methodologies
Seniority
Principal, hands-on IC with technical leadership