Packaging Architect
Core
Develop advanced packaging architecture and guide innovative packaging solutions for automotive, datacenter/HPC, and computing applications.
Role type
Senior IC Packaging Architect (2.5D/3D/3.5D)
Builds
Advanced packaging solutions for automotive, datacenter/HPC, and computing applications
Domain
Semiconductor packaging and system integration
Deliverable
production ML models | product features | infrastructure
Required skills
2.5D/3D/3.5D packaging expertise, STCO knowledge, trade-off analysis across electrical/thermal/mechanical performance, chiplet strategy definition, supply chain engineering partnership, competitive landscape monitoring
Preferred skills
Experience with CoWoS-S/R/L, EMIB/EMIB-T, SoIC, HBM, FCBGA, HBPOP technologies
Technologies
CoWoS-S/R/L, EMIB, EMIB-T, SoIC, HBM, FCBGA, HBPOP
Responsibilities
Identify optimal package architecture balancing electrical, thermal, and mechanical performance; collaborate on silicon-disaggregation and chiplet strategies; perform trade-off analysis on silicon layout and connectivity options; define packaging roadmap and material requirements with supply chain partners; monitor competitive landscape in packaging technologies
Seniority
Senior, hands-on IC
