Principal Engineer- HIG HBM Layout
Core
Lead end-to-end layout execution and full-chip technical decisions for analog, mixed-signal, and custom digital blocks in HBM products.
Role type
Principal Engineer, Analog/Mixed-Signal Custom IC Layout
Builds
High Bandwidth Memory (HBM) chips
Domain
Semiconductor / Memory / Analog & Mixed-Signal IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog/Mixed-Signal layout design, Full-chip integration, Floor planning, Manual routing, LVS/DRC verification, Project planning, Team leadership, Tape-out management
Preferred skills
AI/automation adoption for layout productivity
Technologies
Cadence VLE/VXL, Calibre DRC/LVS
Responsibilities
Lead end-to-end layout execution for analog, mixed-signal, and custom digital blocks; Own full-chip technical decisions covering analog, digital, memory, ESD, EM/IR; Drive project planning and execution including scheduling and milestone tracking; Perform and oversee layout verification activities including LVS, DRC, and Antenna checks; Lead and mentor the layout team on sub-block execution and capability development; Drive innovation and productivity improvements through AI/automation adoption; Collaborate with global cross-functional teams for project alignment.
Seniority
Principal, hands-on IC with strategic leadership
