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Sr. Principal SI/PI Engineer

SAN JOSE💼 Full-time💰 $178,500–$178,500🗓 2026-06-10 → 2026-08-01

Core

Sr. Principal SI/PI Engineer leading test chip package design, evaluation board optimization, and channel model extraction for high-speed IP products.

Role type

Sr. Principal IC SI/PI Engineer (High-Speed SerDes/PHY)

Builds

High-speed IP products, test chips, evaluation boards, and channel models for chip designers

Domain

Semiconductor / High-Speed Digital Design / Signal Integrity

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

High-speed SerDes architecture, 3D/2.5D extraction tools (Sigrity Clarity/PowerSI, Ansys HFSS/SIwave), IBIS-AMI simulations, lab instrumentation (oscilloscopes, TDRs, VNAs), PCB/FCBGA design rules, simulation-measurement correlation

Preferred skills

Debugging ASICs, customer support, presentation skills

Technologies

Sigrity Clarity, PowerSI, Ansys HFSS, SIwave, IBIS-AMI, S-parameter models

Responsibilities

Design and verify test chip package SI/PI, optimize evaluation boards, extract and measure channel models, review customer designs and simulations, debug test chips and customer ASICs in the lab

Seniority

Sr. Principal, hands-on IC

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