HBM SIPI, Staff Engineer
Core
Develop high-quality Signal Integrity (SI) and Power Integrity (PI) analysis for HBM interposers, packages, and silicon channels to ensure industry benchmark signal quality and power delivery integrity.
Role type
Staff Engineer, HBM SI/PI Build Architecture
Builds
High Bandwidth Memory (HBM) solutions for AI and ML accelerators and high-performance computing platforms
Domain
Semiconductor / High-Speed Interface / Advanced Packaging
Deliverable
production ML models
Required skills
Signal integrity (SI) modeling and analysis, Power integrity (PI) modeling and analysis, Electromagnetic (EM) extraction and modeling, Time-domain simulation, Frequency-domain characterization, Circuit simulation, EDA tool automation
Preferred skills
2.5D/3D advanced packaging analysis, Mask-based timing budget analysis, High-speed interface expertise (DDR, HBM, UCIe, PCIe, SERDES), PDN impedance modeling
Technologies
Keysight ADS, Synopsys HSPICE, ANSYS HFSS/SIwave, Cadence PowerSI/PowerDC, SPICE, ADS
Responsibilities
Perform signal integrity channel analysis for 2.5D and 3D silicon interposers, Conduct mask-based timing analysis using time-domain simulations, Support power integrity and PDN analysis including impedance modeling, Perform electromagnetic extraction and modeling of signal and power delivery channels, Automate sign-off processes and collaborate with EDA suppliers
Seniority
Staff, hands-on IC with strategic oversight
