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Hardware & Physical Engineering
› Analog IC Design
Analog IC Design
2,195 open positions
DSP & Systems Architecture Intern
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Marvell Technology
Toronto, ON, CA
CA$94k–CA$127k
27d
Architect, model, and evaluate system-level designs for electrical/optical interconnects and develop/optimize DSP algorithms for high-speed links.
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I/O Design Engineer
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Avago Technologies International Sales Pte. Limited
Yishun, S00, SG
27d
Design and verify analog and mixed-signal ICs, specifically CMOS I/O circuits, bandgap references, op-amps, and comparators for advanced AI programs.
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Validation / Verification Eng, Staff Engineer
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Synopsys
Nepean, ON, CA
$93k
27d
Design, layout, and validate printed circuit boards for memory interface IP characterization and customer reference implementations.
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Layout Engineer
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Nuvoton Technology Singapore Pte. Ltd.
Bedok, S00, SG
27d
Developing physical layouts for CMOS/BiCDMOS Integrated Circuit designs used in high-performance, high-speed analog ICs for SerDes applications, as well as for Automotive and Industrial Battery Management Systems.
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Foundation IP Design Engineer
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Avago Technologies International Sales Pte. Limited
Yishun, S00, SG
27d
Design and build memory or circuit blocks at gate or transistor level to meet performance targets, including floorplanning, simulation, and verification.
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板级先进工艺设计工程师
Huawei
Dongguan, China
27d
Design end-to-end board-level assembly and reliability solutions for high-density computing products, focusing on large chip assembly, warpage engineering, and mixed-module integration.
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Analog Electronics Design Engineer (m/f/d)
Appliedmaterials
Heimstetten,DEU
€70k–€97k
27d
Designing, modifying, and troubleshooting high-precision, low-noise analog and power circuit assemblies for electron beam-based wafer test systems.
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Custom Layout Designer (Analog Layout Designer)
Cadence
CARY, US
27d
Designing high-speed, high-accuracy CMOS integrated circuits IP blocks (analog/mixed-signal) for consumer, industrial, and automotive markets using leading-edge silicon processes.
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SRAM Design Engineer
NVIDIA
US, CA, Santa Clara
$116k–$190k
27d
Designing transistor-level SRAM circuits and developing automated compilers for SRAM macro assembly and validation.
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AI GPU Power Delivery Pathfinding Researcher
Intel
US, Oregon, Hillsboro
$142k
27d
Research and develop next-generation Power Delivery IPs for Intel's AI and Datacenter Products to achieve industry-leading performance in efficiency, power density, and bandwidth.
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MTS - Thermal Simulation Engineer
Micron
Richardson, Texas, United States of America
27d
Lead high-fidelity thermal and thermo-mechanical modeling for next-generation High Bandwidth Memory (HBM) packages and 2.5D/3D semiconductor systems.
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Senior RF/Analog Design Engineer
Ciena
Quebec, CA
$103k–$164k
27d
Design, simulate, and optimize high-speed optoelectronic components and RF/microwave structures for advanced optical communications products.
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MTS - HBM Thermal Integration Engineer
Micron
Richardson, TX, US
27d
Drive thermal performance optimization for next-generation High Bandwidth Memory (HBM) products through design, process, packaging, assembly, and test improvements.
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Senior Staff Engineer, Power Device Modeling and Product Design
Infineon
El Segundo, CA
27d
Define product concepts and design targets for integrated power products, perform chip- and system-level simulations, and develop/calibrate SPICE models for power MOSFETs.
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Principal PCB Design Engineer
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Formfactor, Inc.
Singapore, S00, SG
27d
Develop and validate high-speed digital, RF, analog, and mixed-signal PCB designs for semiconductor test and measurement equipment, optimizing for manufacturability and yield.
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Analog IC Layout Engineer
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NXP Semiconductors
Guadalajara, JAL, MX
27d
Develop analog and mixed-signal integrated circuit layouts from schematic to tape-out, supporting physical implementation for automotive power solutions.
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DSP & Systems Architecture Intern
Marvell
Toronto, Canada
CA$94k–CA$127k
27d
Architect, model, and evaluate system-level designs for electrical/optical interconnects and develop/optimize DSP algorithms for high-speed links.
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Principal Engineer, Signal Integrity
Marvell
Santa Clara, CA, US
$151k–$226k
27d
Define, analyze, and verify system interconnects for high-speed digital systems across board, switch, and optical platforms to meet performance and schedule objectives.
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Principal Engineer, Power Integrity
Marvell
Santa Clara, CA, US
$151k–$226k
27d
Drive end-to-end power integrity analysis, PDN design, and verification for board, switch, and optics platforms in AI and high-speed communications.
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High-Speed Electro-Optical IC Engineer (RFIC Engineering)
SpaceX
Redmond, WA
27d
Designing and developing high-speed electro-optical integrated circuits (EIC/PIC) for Starlink satellite and ground infrastructure to enable global broadband connectivity.
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Packaging Design Engineer
Advanced Micro Devices, Inc
Austin, Texas
27d
End-to-end package design execution for complex semiconductor products, focusing on substrate layouts, bump maps, and interposer designs for advanced packaging architectures.
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Principal Analog Mixed-Signal IC Design Engineer
Blue Origin
Kraków, małopolskie
27d
Leading the architecture, development, and integration of advanced high-speed data converters (ADCs and DACs) and fundamental analog/mixed-signal functions in advanced FinFET CMOS technologies for Blue Origin's TeraWave satellite communications network.
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Staff Server Platform Hardware Architecture
Advanced Micro Devices, Inc
Bangalore, India
27d
Lead end-to-end design of high-speed, high-complexity PCBs and define technical direction for server platform hardware architecture.
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Principal Package Engineer
Microsoft
United States, Washington, Redmond
27d
Lead advanced semiconductor packaging solutions for Silicon devices and chiplet architectures, driving design, qualification, and manufacturing bring-up for Azure datacenter products.
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Staff Analog Engineer
Renesas-Electronics
Catania, it
€50k
27d
Design and development of smart power stages and power management integrated circuits (ICs), including low-power precision analog and mixed-signal circuits.
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Signal and Power Integrity Engineer
SPD Technology
Remote
27d
Lead signal integrity (SI) and power integrity (PI) analysis and optimization for High-Performance Computing (HPC) leveraging advanced 2.5D/3D packaging technologies.
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Design Engineer
Monolithic Power Systems
España
27d
Designing analog and mixed-signal ICs for Power Management Products utilizing sub-micron BiCMOS /DMOS technologies.
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Senior Analog Mixed-Signal IC Layout Engineer
Asteralabs
Singapore City
28d
Design and/or verification of blocks using leading edge methodology and tools for high-performance compute and networking standards in advanced CMOS process nodes.
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RF Design Engineer | Kilby Labs
Texas Instruments
United States
28d
Develop innovative RF, SerDes, and mm-wave ICs and systems for industrial, automotive, and communications applications.
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STAGE – Conception analogique de chemin de lecture d’une NVM – F/H
STMicroelectronics
Grenoble, France
28d
Designing the read path for embedded non-volatile memory (ePCM) in advanced 18nm FDSOI nodes to optimize bandwidth and energy consumption for diverse applications.
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Layout Automation Engineer
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Keysight Technologies
Calabasas, CA, US
$143k
28d
Develop physical layouts for RF, microwave, and analog integrated circuits, optimizing for electrical performance, area, and manufacturability while contributing to layout automation.
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Staff Engineer, Advanced Packaging Development - Design Enablement & Layout
Micron
Boise, ID - Main Site, US
28d
Develop design rules, requirements, and test structures for advanced packaging; create layout and DBR test vehicle designs to support technology development.
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Senior SI/PI Engineer (High-Speed Systems)
Qualcomm
Hsinchu City, Taiwan
28d
Senior IC engineer supporting Signal Integrity (SI) and Power Integrity (PI) for high-speed system components like connectors, repeaters, and optical devices.
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Career Accelerator Program - Packaging Engineer - PhD
Texas Instruments
Santa Clara, CA, United States
28d
Design, develop, and analyze semiconductor packaging technologies (Wirebond, Flip Chip, Modules, SIPs) to enable differentiation for TI's analog and embedded processing products.
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MTS - HIG HBM - ARCHITECTURE
Micron
Richardson, Texas, United States of America
28d
HBM IO Design Architecture Engineer focusing on IO/TSV design, electrical modeling, Signal Integrity (SI), and Power Integrity (PI) analysis for High Bandwidth Memory solutions.
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Senior Design Engineer
Micron
San Jose, CA, US
$120k
28d
Design, simulate, optimize, and floor-plan NAND circuit blocks for memory products, implementing analog and mixed-signal designs.
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Principal Product Enigneer - Integrity 3D-IC/Innovus
Cadence
GYEONGGI-DO (Seoul), KR
28d
Develop design flows for leading-edge 3D IC designs using Cadence Integrity 3D-IC and Innovus platforms, focusing on system-level planning and physical implementation.
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Semiconductor Design Engineer
Micron
Boise, Idaho, United States of America
28d
Focus on technology node development to advance next-generation DRAM technologies and contribute to DRAM product design.
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Senior Layout Designer
Micron
Richardson, TX, US
28d
Design and optimize physical layouts for memory and storage semiconductor products to ensure manufacturing efficiency, cost, quality, and reliability.
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Signal and Power Integrity Engineer, Senior to Staff Level
Qualcomm
Hsinchu City, Taiwan
28d
Optimize signal and power integrity performance for next-generation server systems by collaborating with IC, Package, and PCB designers.
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Foundation IP Development Engineer
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Analog Devices
Valencia, Valencian Community, Spain
28d
Develop logic IPs (standard cells and IOs) to support analog, digital, and mixed-signal SOC designs at various technology nodes.
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Electrical Engineer Co-op/Intern
Lumentum
Canada - Ottawa (Bill Leathem)
$50k–$73k
28d
Verification of analog, digital, and mixed-signal circuitry for new optical module product lines.
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Package Design Engineer
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SPD Technology
Remote
28d
Develop custom silicon package substrate designs for advanced 2.5D/3.5D packaging technologies used in high-performance ML and AI chips.
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Senior Staff Engineer Analog Mixed Signal Design (f/m/div)
Infineon
Munich
28d
Design complex analog and mixed signal circuits, define verification strategies, and provide technical direction to layout engineers for groundbreaking R&D projects.
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MTS - Optical Interconnect Design Architect
Micron
Richardson, TX, US
28d
Define and drive next-generation optical connectivity solutions for future memory, AI accelerator, and high-performance computing platforms.
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Engineer, Advanced Packaging Development - Design Enablement & Layout
Micron
Boise, ID - Main Site, US
28d
Develop design rules, requirements, and test structures for advanced packaging; create layout and DBR test vehicle designs to support technology development.
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Signal and Power Integrity Engineer
↗
SPD Technology
Remote
28d
Lead signal integrity (SI) and power integrity (PI) analysis and optimization for High-Performance Computing (HPC) leveraging advanced 2.5D/3D packaging technologies to shape AI/ML hardware acceleration.
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Engineer, Advanced Packaging Development - Design Enablement & Layout
Micron
Boise, Idaho, United States of America
28d
Develop design rules, requirements, and test structures for advanced packaging; create layout and DBR test vehicle designs to support technology development.
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MTS - Optical Interconnect Design Architect
Micron
Richardson, Texas, United States of America
28d
Define and drive next-generation optical connectivity solutions for future memory, AI accelerator, and high-performance computing platforms.
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Staff Engineer, Advanced Packaging Development - Design Enablement & Layout
Micron
Boise, Idaho, United States of America
28d
Develop design rules, requirements, and test structures for advanced packaging; create layout and DBR test vehicle designs to support technology development.
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