Analog IC Design
1,386 open positions
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Si Photonics Design Engineer↗ MolexNepean, Ontario, Canada $150k–$150k1mo Design, implement, and validate Silicon Photonics (SiPho) components and Photonic Integrated Circuits (PICs) for optical connectivity in AI fabrics, data centers, and datacom applications.
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Principal Engineer Device Engineering (FRCMOS) GlobalFoundriesSingapore 1mo Design, development, and characterization of MOSFETs, non-volatile memory cells, and CMOS-based sensors to meet performance and reliability requirements.
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I/O Design Engineer BroadcomUSA-AZ-Chandler-North Juniper Drive $110k–$110k1mo Design and verification of analog and mixed-signal I/O IP, including CMOS I/O, bandgap references, op-amps, and comparators for advanced AI programs.
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Principal Engineer, Mixed Signal Design Engineering AnalogdevicesUS, TX, Dallas, Tollway $185k–$185k1mo Full ownership of complex analog and mixed-signal circuit blocks for automotive high-speed Serializer/Deserializer (SerDes) products, spanning concept to mass production.
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Senior Analog Design Engineer↗ Ess TechnologyKelowna, BC, CA 1mo Design and develop high-performance mixed signal circuits for audio DACs, ADCs, PLLs, and Class D amplifier building blocks.
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Sr/Staff Mixed-Signal Design & Verification Engineer↗ Monolithic Power Systems, Inc.Barcelona, Catalonia, Spain 1mo Lead Mixed-Signal Design and Verification tasks, environment, and developments for complex mixed-signal ICs including power management, signal management, and mixed-signal functions.
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RF Analog Layout Engineer (FinFET Technology)↗ CapgeminiFundão, ES, BR 1mo Design layouts for high-frequency analog/RF blocks (LNAs, mixers, VCOs, PLL) in FinFET technology, optimizing routing and shielding to minimize parasitics and ensure performance.
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Senior Engineer - Analog Design↗ Microchip Technology Inc.Ottawa, Ontario, Canada $90k–$140k1mo Design and simulate analog IP blocks for mixed-signal SoC products, implementing circuit requirements into production-ready designs.
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Coherent Systems Architect - Optical Modem Development and Optimization↗ NokiaKanata, Ontario, Canada 1mo Design, characterize, and develop leading coherent optical transceivers using next-generation photonic integrated circuits (PIC) and digital signal processor (DSP) technologies.
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Optical System Engineer, Senior Staff↗ QualcommOttawa, ON, CA $133k–$133k1mo Design, simulate, test, and optimize high-speed (100Gbps/200Gbps) PAM4 optical transmission modules for data centre applications using Silicon Photonics and EAM devices.
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Principal Design Engineer↗ CadenceCork, County Cork, Ireland 1mo Lead Analog and Mixed Signal design of high-speed memory interface analog components for state-of-the-art DDR memory interface PHYs in leading edge technology nodes.
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Senior Packaging Engineer↗ Qorvo, Inc.Barcelona, Catalonia, Spain 1mo Conduct thermal, mechanical, and thermo-mechanical FEA simulations to advance simulation methodologies for semiconductor packaging.
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Senior Laser Designer IntelUS, California, Santa Clara $164k–$312k1mo Design, simulate, and optimize DFB lasers for high-speed optical communication applications and integrate them into Silicon Photonic circuits.
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Principal Hardware Designer↗ SanminaOttawa, ON, CA $150k–$150k1mo Lead hardware design of optical transceivers from concept to pre-production, ensuring performance, manufacturability, and cost efficiency.
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Digital and Mixed Signal IC Design/DV Engineer Texas InstrumentsTucson, AZ, United States 1mo Develop mixed-signal current sensing ICs (Shunt and Hall based) covering architectural development, design, and digital verification.
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Senior Principal Product Definer Renesas-ElectronicsSan Jose, CALIFORNIA, us $220k–$220k1mo Define innovative high-performance analog and mixed-signal products (amplifiers, ADCs, DACs) by translating customer needs into objective specifications for IC design teams.
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Senior Engineer - HBM Design for Test (DFT) MicronRichardson, TX 1mo Define, implement, integrate, and support Design for Test (DFT) solutions for High Bandwidth Memory (HBM) core and base dies to ensure test, quality, and manufacturability.
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Chip Package Signal and Power Integrity Engineer↗
GoogleSunnyvale, CA, US
$192k–$192k1mo
Drive chip-package-system co-design by performing SI/PI analysis and optimization for HPC based on 2.5D/3D package technology to meet electrical requirements for AI/ML hardware.
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Senior Hardware Engineer- Optical AdtranAtlanta, GA 1mo Design, evaluate, qualify, and integrate advanced optical components and subsystems for next-generation DWDM optical transport solutions.
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Standard Cell Layout Design Engineer↗ North American Production SharingTijuana, BCN, MX 1mo Assemble and optimize standardized layout blocks (Lego pieces of digital CMOS circuit libraries) to ensure perfect alignment and seamless cell boundaries for advanced semiconductor devices.
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IO/ESD Custom Layout Engineer↗ PersolOutram, S00, SG 1mo Physical design implementation of IO/ESD Foundation IP, Analog IP, and RFIC across multiple process nodes and foundries.
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Senior Engineer Mixed Signal Layout (f/m/div)↗ Infineon TechnologiesVillach, K, AT 1mo Execute full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal components, ensuring signal and power integrity through precise matching, isolation, and parasitic management.
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Research Assistant/Engineer (Integrated Circuits Design)↗ National University Of SingaporeQueenstown, S00, SG 1mo Design and develop next-generation Analog-to-Digital Converters (ADC) and mixed-signal circuits for high-performance, low-power applications.
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EDA Applications Engineer↗ QorvoBarcelona, CT, ES 1mo Support electromagnetic (EM) simulation activities across RFIC, package, and module development teams by troubleshooting simulation setups, modeling issues, and tool challenges.
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Technology Development Engineer (Silicon Photonics)↗ United Microelectronics Corporation (singapore Branch)Pasir Ris, S00, SG 1mo Develop and optimize 300mm Silicon Photonics (SiPh) technology platforms, including pluggable modules, co-packaged optics (CPO), and photonic interposer solutions.
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Analog Design, Engineer↗ SynopsysMississauga, ON, CA 1mo Design and develop high-performance analog building blocks (SERDES, DDR, memory, PLLs, regulators) for IP that ships in customer silicon.
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Staff Analogue Designer, CMOS Modelling
IonQOxford, England, UK
1mo
Own full-chip mixed-signal CMOS modelling and behavioural model development for cryo-CMOS ASICS controlling trapped-ion quantum processors.
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Electrical Design Engineer LightmatterBoston, MA $149k–$149k1mo Design and develop board and system solutions leveraging 3D-stacked photonics engines for advanced AI, machine learning, and large-scale interconnect platforms.
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IO/Analog Layout Engineer StmicroelectronicsGreater Noida, India 1mo Develop advanced parallel standard IO layouts (I2C, SPI, GPIO) and floor plans for differentiated sub-micron technology.
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PCB Layout Design Engineer↗ Celesticaแหลมฉบัง, 46, TH 1mo Lead PCB Layout Engineer driving design, development, and implementation of technical solutions for complex, multi-domain projects, serving customers and internal engineering teams.
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?Optics Engineer Meiningen, THUERINGEN 1mo Qualifying optoelectronic transmitter and receiver components for high-gigabit data transmission (10 Gbit/s+) and researching cutting-edge optical technologies for commercialization.
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Intermediate AE MonolithicpowerHangzhou - China 1mo Define and debug analog IC products, develop reference circuits, write datasheets and application notes, and provide application support and technical training.
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