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Hardware & Physical Engineering
› Analog IC Design
Analog IC Design
1,386 open positions
Senior Signal Integrity Engineer - Optical Transceivers & LPO Modules
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Amphenol
Nashua, NH, US
2mo
Design, simulation, validation, and optimization of next-generation optical transceivers, Linear Pluggable Optics (LPO), and high-speed networking products supporting 800G, 1.6T, and future applications.
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Senior Signal Integrity Engineer
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Amphenol
Nashua, NH, US
2mo
Design, simulate, and validate high-speed active electrical cables (AEC), optical transceivers, and networking products supporting 800G and 1.6T applications.
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Hardware Engineer - Interconnect Systems
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Amphenol
Nashua, NH, US
2mo
Design, development, and validation of hardware platforms for Ethernet and PCIe interconnect products including Active Electrical Cables, Optical Transceivers, and Linear Pluggable Optics.
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High-Speed Analog Circuit Design Engineer
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Celero Communications
Remote, US
$150k–$150k
2mo
Architecting and designing high-speed mixed-signal circuits for next-generation AI transceivers and critical analog functions.
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Template Job
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Astera Labs
San Jose, CA, US
$207k–$207k
2mo
Architect and design high-performance analog and mixed-signal circuits for SerDes, PHY, and high-speed I/O to power rack-scale AI infrastructure.
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Silicon Photonics Technology Architect / Senior System Architect for Data Center Applications
GlobalFoundries
USA - New York - Malta
$143k–$143k
2mo
Drive R&D projects to develop next-generation Silicon Photonics (SiPh) solutions primarily for data center applications, integrating novel materials into foundry flows.
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DRAM Design Working Student in Munich (m/f/d)
Micron
Munich (MDC), Germany
$0k–$0k
2mo
Support the design and simulation of analog or digital circuit blocks for high-performance memory solutions in the graphics and AI markets.
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Analog Design Layout Manager
Altera
Jerusalem, Israel
2mo
Lead and manage the AMS SerDes layout team, owning layout execution for Analog Mixed-Signal SerDes designs.
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Hardware Board Design Senior Staff Engineer
Marvell
Yokneam
2mo
Designing high-speed digital and analog circuitry on complex high-density PCBs for Ethernet switches, microcontrollers, and processors, ensuring signal and power integrity.
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HBM Architect
Skhynixamerica
San Jose, CA
$150k–$150k
2mo
Establishing technical engagement with US customers to address base-die architectural challenges in HBM and 3D-stacked DRAM, while building a focused design team and developing advanced customized HBM architectures.
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On/Off-Chip SI/PI Engineer
Skhynixamerica
San Jose, CA
$150k–$150k
2mo
Critical technical liaison providing hands-on SI/PI analysis to resolve HBM challenges and drive system-level co-optimization for advanced memory architectures.
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Senior Quantum Engineer - Readout
Microsoft
United States, Washington, Redmond
2mo
Design and test scalable readout circuitry for topological qubits and interface across teams to codesign the readout system with evolving qubit designs.
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Principal Signal and Power Integrity Engineer
Asteralabs
San Jose
$203k–$203k
2mo
Execute SI planning, design, modeling, simulation, and lab validation for rack-scale AI infrastructure connectivity products.
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Manager, Package Design Engineering
Asteralabs
San Jose
$230k–$230k
2mo
Lead and scale the Package Design team to deliver end-to-end IC packaging solutions (FCBGA/FCCSP, monolithic, multi-die, chiplet) for advanced AI infrastructure and connectivity products.
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Senior/ Staff Package Design Engineer
Asteralabs
Haifa
2mo
Design and qualify advanced IC packaging solutions for high-performance connectivity silicon to enable AI scale-up and scale-out systems.
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Principal Silicon Engineer - System Modeling
Microsoft
United States, California, Mountain View
$143k–$143k
2mo
System modeling of analog circuits and SerDes interface IP, bridging post-silicon validation (ATE) and design teams while contributing to architectural direction.
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Principal Analog Design Engineer
Renesas-Electronics
Duluth, GEORGIA, us
2mo
Architect, design, and verify CMOS analog blocks (Tx, Rx, PLL, high-precision circuits) and DDR I/O interfaces for custom ASICs, focusing on low power, signal integrity, and performance optimization.
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PCB Layout Designer
Micron
Boise, Idaho, United States of America
2mo
Lead the detailed physical layout of complex, high-speed PCBs, including pre-engineering planning, stackup definition, and design rule development to ensure signal integrity and manufacturability.
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Staff DRAM Design Engineer
Micron
Boise, Idaho, United States of America
2mo
Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic to shape memory architectures and circuit innovations.
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Analog Design, Sr Staff Engineer
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Synopsys
Porto Salvo, P11, PT
2mo
Developing high-performance integrated circuits, specifically cutting-edge SerDes products, for industries including mobile, automotive, cloud computing, HPC, AI, IoT, 5G, and storage.
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Staff Mixed-Signal Design Engineer
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Analog Devices
Austin, TX, US
$131k–$131k
2mo
Designing advanced high-speed data converters (RF DACs, ADCs, SerDes PHYs) in FinFET processes for SoC integration.
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High-Speed Analog Layout Design Engineer
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Celero Communications
Remote
2mo
Lead physical layout design of complex analog/mixed-signal IP blocks (ADCs, DACs, PLLs) for advanced optical communication systems.
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Staff Engineer - HBM Analog Design
Micron
Bengaluru, India
2mo
Design, implementation, and integration of complex analog circuits and custom digital blocks for advanced DRAM products, with a strong emphasis on leveraging AI tools for engineering efficiency and PPA optimization.
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Sr. Analog Design Engineer
Monolithicpower
Shanghai - China
2mo
Design and develop high-voltage analog multiplexer circuits, low-noise amplifiers, and power management ICs for ultrasound applications.
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Advanced Packaging Modeling Engineer
GlobalFoundries
USA - New York - Malta
$98k–$98k
2mo
Mechanical, thermal, or electrical modeling engineer optimizing 3DHI and advanced packaging for logic, RF, analog, and memory technologies.
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RFIC System Engineer
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Apple
San Francisco Bay Area, CA, US
$129k–$129k
2mo
Architect, design, and deliver state-of-the-art CMOS radios (RF-to-bits) for Apple's wireless SoCs, focusing on energy-efficient design and new wireless technologies.
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DSP - Optical Design Engineer
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Celero Communications
Ottawa, ON, CA
$150k–$150k
2mo
Design and optimize DSP algorithms for high-speed optical transceivers used in next-generation optical modems for AI and data center infrastructure.
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Principal Engineer - Analog Design
Micron
Bengaluru, India
2mo
Design, implement, and optimize complex analog mixed circuits (CMOS Amplifiers, Comparators, Bandgap references, V2I converters, LDOs, charge pumps, Oscillators, DLL, IO circuits) for advanced High Bandwidth Memory (HBM) products.
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Principal Signal/Power integrity Engineer
Marvell
Yokneam
2mo
Develop creative power and signal integrity solutions for Marvell switch devices at package and system levels, ensuring designs meet challenging electrical performance requirements.
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High-Speed Analog Layout Design Engineer
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Celero Communications
Remote
2mo
Lead physical layout design of complex analog/mixed-signal IP blocks (ADCs, DACs, PLLs) for advanced optical communication systems.
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Principal Signal & Power Engineer (Die to Die and Chiplet Design)
Microsoft
United States, North Carolina, Raleigh
2mo
Design and analyze end-to-end Signal and Power Integrity (SIPI) solutions for high-performance compute and AI SoCs, chiplet architectures, and data center platforms.
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Principal Engineer - Analog Design
Micron
Bengaluru, India
2mo
Design and layout of complex analog mixed circuits for High Bandwidth Memory (HBM) products, including CMOS amplifiers, comparators, and power delivery networks.
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MTS – ASIC Silicon Debug, Device Technology & Yield Engineering
Micron
Hsinchu, Taiwan
2mo
Lead end-to-end investigation of silicon yield loss, field returns, and reliability failures for advanced ASICs, driving root-cause analysis across process, design, test, and package interactions.
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Senior Engineer - Analog Design
Micron
Bengaluru, India
2mo
Design, implementation, and integration of complex analog circuits and custom digital blocks for advanced DRAM products.
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Senior / Principal Layout Engineer – Module Architecture (Pathfinding)
Micron
San Jose, CA
$202k–$202k
2mo
Lead layout-driven architecture exploration and feasibility studies for next-generation memory modules (DDR6, LPDDR6/7, MRDIMM, SOCAMM2) and interconnects.
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Senior Optics Engineer
Adtran
Ottawa, ON
2mo
Design, verify, and support pluggable optical transceiver modules for datacenter, metro, and core network applications.
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Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Cisco
San Jose, California, US
$195k–$195k
2mo
Architect, design, layout, measure, and productize ultra-deep sub-micron-based CMOS products for high-speed optical communications transceivers.
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Senior Analog & Mixed-Signal IC Designer
Phizenix
Phizenix
2mo
Design and verify high-speed analog and mixed-signal circuits including ADCs, DACs, PLLs, clock distribution, laser/modulator drivers, and transimpedance amplifiers for data communications, wireless, and compute applications.
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Digital IC Design Engineer
Texas Instruments
Bengaluru, Karnataka, India
2mo
Design high-speed mixed-signal communication circuits and high-performance digital circuits interfacing with analog circuitry for overall system integration.
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Senior Circuit Design Engineer - Noise
NVIDIA
US, CA, Santa Clara
$168k–$168k
2mo
Design innovative circuits (digital, semi-custom, mixed-signal analog) for silicon correlation and noise mitigation in deep submicron technologies.
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Principal SI/PI Design Engineer
Ciena
New Providence - NJ
$99k–$99k
2mo
Lead electrical package design for custom in-house photonic, analog, and digital ICs supporting next generation optical modules.
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High Speed Analog I/O designer
Broadcom
USA-California-San Jose-1320 Ridder Park Drive
$144k–$144k
2mo
Design and optimize high-speed interface buffer chips for DDR/LP5/5X/6, chiplets, and beyond in FinFET process nodes.
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Sr. Associate PCB Engineer (Taipei)
Monolithicpower
Taipei - Taiwan
2mo
Senior PCB Layout Engineer responsible for end-to-end design of high-complexity multilayer and HDI boards for AI servers, data centers, and power systems.
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Senior Mixed Signal and Analog Circuit Designer
NVIDIA
Taiwan, Hsinchu
2mo
Design high-speed mixed-signal circuits and complex analog functions for NVIDIA GPUs and SoC products (Tegra) in deep sub-micron CMOS technologies.
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Interconnect Hardware Engineer - Networking
NVIDIA
Denmark, Roskilde
2mo
End-to-end development of high-speed optical transceivers for next-generation data center interconnects.
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Senior Circuit Design Engineer
NVIDIA
US, CA, Santa Clara
$168k–$168k
2mo
Design innovative digital, semi-custom, and mixed-signal analog circuits for silicon correlation and hardware security in deep submicron technologies.
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Principal Engineer - Analog and Mixed-Signal Physical Design
Microsoft
United States, Texas, Austin
2mo
Drive hands-on physical design implementation for analog and mixed-signal IP blocks, ensuring timing convergence and signoff closure.
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Principal Opto-Electronics Device Engineer
Microsoft
United Kingdom, Cambridgeshire, Cambridge
2mo
Design, simulate, and characterize high-speed optoelectronic devices for optical communication applications.
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Principal Optical Packaging Engineer
Microsoft
United Kingdom, Cambridgeshire, Cambridge
2mo
Lead the design and development of packaging architectures for co-packaged optics, integrating photonic devices, ASICs, and interposers to optimize signal integrity, power delivery, and thermal performance.
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R&D Engineer
Broadcom
IND-Bangalore Electronic City - S1
2mo
R&D Engineer responsible for physical design, verification, and tapeout of analog/RF ICs, including place & route, CTS, DRC/LVS, and timing fixes.
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