STAGE – Conception analogique de chemin de lecture d’une NVM – F/H
Core
Designing the read path for embedded non-volatile memory (ePCM) in advanced 18nm FDSOI nodes to optimize bandwidth and energy consumption for diverse applications.
Role type
Analog circuit design intern (ePCM read path)
Builds
Read path circuits and methodologies for ePCM memory cells
Domain
Semiconductor / Analog IC Design / Non-volatile Memory
Required skills
Analog circuit design, ePCM technology knowledge, memory array sizing, differential amplifiers, circuit simulation, methodology development
Preferred skills
Experience with 18nm FDSOI nodes, knowledge of back-end metal layers
Technologies
ePCM, 18nm FDSOI, differential amplifiers, circuit simulators
Responsibilities
Simulate ePCM read path functionality including differential amplifiers, investigate memory resizing dependencies, re-design read paths for various memory sizes, synthesize an optimization methodology
Seniority
Intern (6 months)
