Career Accelerator Program - Packaging Engineer - PhD
Core
Design, develop, and analyze semiconductor packaging technologies (Wirebond, Flip Chip, Modules, SIPs) to enable differentiation for TI's analog and embedded processing products.
Role type
PhD-level Packaging Engineer (Semiconductor)
Builds
Advanced semiconductor packages for analog and embedded processing products
Domain
Semiconductor manufacturing and packaging
Required skills
Semiconductor packaging design, FEM modeling, heat transfer analysis, thermodynamics, stress analysis, material downselection, design-of-experiments, electrical/mechanical/thermal modeling
Preferred skills
AutoCAD, Semiconductor MEMS/3D integration, CVD/PVD/thin film deposition, electroplating, plasma etch, wafer bumping, optical packaging, plating, adhesion, surface treatment, semiconductor fabrication tools (VI Scopes, X-ray Inspection, FA techniques)
Technologies
AutoCAD, FEM modeling tools, VI Scopes, X-ray Inspection, FA techniques
Responsibilities
Partner with businesses to design and develop internal and external solutions for semiconductor packaging technologies; Participate in cross-functional teams supporting product qualification and production; Direct design-of-experiments and work with material suppliers to downselect innovative packaging materials; Conduct electrical, mechanical, thermal models to comprehend silicon-to-package interaction and establish design rules
Seniority
Entry-level (PhD graduate)
