Senior Layout Designer
Core
Design and optimize physical layouts for memory and storage semiconductor products to ensure manufacturing efficiency, cost, quality, and reliability.
Role type
Senior IC layout engineer (analog/digital)
Builds
Memory and storage chips (DRAM, NAND, etc.)
Domain
Semiconductor / VLSI / Analog & Digital IC Design
Required skills
CMOS circuit design, VLSI layout, Cadence Virtuoso, LVS, DRC, place and route, standard cell construction, analog layout techniques
Preferred skills
Layout synthesis, AI-enabled floor planning tools, innovative process improvement
Technologies
Cadence Virtuoso, Calibre
Responsibilities
Design physical layouts for circuits, perform layout synthesis and place and route, utilize LVS and DRC tools for verification, apply standard cell and analog layout techniques, collaborate with Design Engineering and Process Integration groups.
Seniority
Senior, hands-on IC
