Signal and Power Integrity Engineer, Senior to Staff Level
Core
Optimize signal and power integrity performance for next-generation server systems by collaborating with IC, Package, and PCB designers.
Role type
Senior to Staff Signal and Power Integrity Engineer
Builds
Next-generation server compute platforms
Domain
Semiconductor / High-speed digital interfaces
Required skills
Electromagnetics, transmission line theory, crosstalk analysis, field solvers (HFSS, Q3D, Sentinel-PSI, Clarity), simulation tools (ADS, HSPICE), PCB design tools (Cadence Allegro/APD/SIP, Mentor Xpedition)
Preferred skills
AI tools for engineering efficiency, MATLAB, programming languages, LPDDRx/PCIe/XLink design specifications
Technologies
HFSS, Q3D, Sentinel-PSI, Clarity, ADS, HSPICE, Cadence Allegro, APD, SIP, Mentor Xpedition
Responsibilities
Perform package and PCB extraction for time-domain and frequency-domain analysis; Conduct system-level analysis for DDR, SerDes, and Power Delivery Network (PDN); Develop design guidelines for Package and PCB design; Collaborate with cross-functional teams to optimize signal and power integrity performance
Seniority
Senior to Staff, hands-on IC
