SRAM Design Engineer
Core
Designing transistor-level SRAM circuits and developing automated compilers for SRAM macro assembly and validation.
Role type
Senior IC analog/RF circuit designer (SRAM)
Builds
SRAM macros and compilers for NVIDIA SOC designs
Domain
Semiconductor design, memory circuits, AI-assisted engineering
Deliverable
production ML models
Required skills
Transistor-level circuit design, SRAM macro design, Cadence Virtuoso, physical verification, logical verification, debugging, process node exploration, AI tool usage
Preferred skills
Silicon testing, debugging, AI coding tools (Codex, Claude Code)
Technologies
Cadence Virtuoso, NVIDIA compute resources
Responsibilities
Design transistor-level SRAM circuits, supervise layout implementation, perform physical and logical verification, debug SRAM macros, develop SRAM compilers for automated macro assembly, explore future process nodes for optimal PPA, collaborate with SOC design partners
Seniority
Senior, hands-on IC
